Searched +full:0 +full:xf001c000 (Results 1 – 8 of 8) sorted by relevance
67 enum: [ 0, 1 ]109 const: 0135 reg = <0xfff8c000 0x4000>;159 reg = <0xf001c000 0x100>;181 reg = <0xf001c000 0x100>;183 #size-cells = <0>;
24 const: 066 enum: [0, 1, 2, 3]67 default: 097 #sound-dai-cells = <0>;99 reg = <0xf001c000 0x100>;101 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |103 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |109 pinctrl-0 = <&pinctrl_i2s_default>;
18 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */30 #define ATMEL_ID_USART0 12 /* USART 0 */36 #define ATMEL_ID_TWI0 18 /* Two-Wire Interface 0 */39 #define ATMEL_ID_MCI0 21 /* High Speed Multimedia Card Interface 0 */42 #define ATMEL_ID_SPI0 24 /* Serial Peripheral Interface 0 */56 #define ATMEL_ID_SSC0 38 /* Synchronous Serial Controller 0 */70 #define ARCH_ID_SAMA5D3 0x8a5c07c071 #define ARCH_EXID_SAMA5D31 0x0044430072 #define ARCH_EXID_SAMA5D33 0x0041430073 #define ARCH_EXID_SAMA5D34 0x00414301[all …]
15 #define ATMEL_ID_FIQ 0 /* FIQ Interrupt */21 #define ATMEL_ID_USART0 6 /* USART 0 */23 #define ATMEL_ID_DMA0 8 /* DMA Controller 0 */40 #define ATMEL_ID_UART0 27 /* UART 0 */45 #define ATMEL_ID_TWI0 32 /* Two-Wire Interface 0 */48 #define ATMEL_ID_MCI0 35 /* High Speed Multimedia Card Interface 0 */50 #define ATMEL_ID_SPI0 37 /* Serial Peripheral Interface 0 */53 #define ATMEL_ID_TC0 40 /* Timer Counter 0 (ch. 0, 1, 2) */61 #define ATMEL_ID_SSC0 48 /* Synchronous Serial Controller 0 */67 #define ATMEL_ID_GMAC0 54 /* Ethernet MAC 0 */[all …]
46 #size-cells = <0>;47 cpu@0 {50 reg = <0x0>;56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;61 reg = <0x20000000 0x8000000>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;74 clock-frequency = <0>;79 #clock-cells = <0>;[all …]
37 #size-cells = <0>;39 cpu@0 {42 reg = <0>;48 reg = <0x20000000 0x10000000>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x00300000 0x100000>;68 ranges = <0 0x00300000 0x100000>;79 #size-cells = <0>;81 reg = <0x00500000 0x100000[all …]
45 #size-cells = <0>;46 cpu@0 {49 reg = <0x0>;55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;59 reg = <0x20000000 0x8000000>;65 #clock-cells = <0>;66 clock-frequency = <0>;71 #clock-cells = <0>;72 clock-frequency = <0>;77 #clock-cells = <0>;[all …]
149 0x80000000 | 0xf0000000 | UART0150 0x80004000 | 0xf0004000 | UART1151 0x80008000 | 0xf0008000 | UART2152 0x8000c000 | 0xf000c000 | UART3153 0x80010000 | 0xf0010000 | UART4154 0x80014000 | 0xf0014000 | UART5155 0x80018000 | 0xf0018000 | UART6156 0x8001c000 | 0xf001c000 | UART7157 0x80020000 | 0xf0020000 | UART8158 0x80024000 | 0xf0024000 | UART9[all …]