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/openbmc/linux/Documentation/devicetree/bindings/sram/
H A Dsram.yaml159 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
163 ranges = <0 0x5c000000 0x40000>;
166 reg = <0x100 0x50>;
170 reg = <0x1000 0x1000>;
175 reg = <0x20000 0x20000>;
190 reg = <0x02020000 0x54000>;
193 ranges = <0 0x02020000 0x54000>;
195 smp-sram@0 {
197 reg = <0x0 0x1000>;
202 reg = <0x53000 0x1000>;
[all …]
/openbmc/linux/arch/arm/mach-shmobile/
H A Dpm-rcar-gen2.c21 #define RST 0xe6160000
23 #define CA15BAR 0x0020 /* CA15 Boot Address Register */
24 #define CA7BAR 0x0030 /* CA7 Boot Address Register */
25 #define CA15RESCNT 0x0040 /* CA15 Reset Control Register */
26 #define CA7RESCNT 0x0044 /* CA7 Reset Control Register */
32 #define CA15RESCNT_CODE 0xa5a50000
33 #define CA15RESCNT_CPUS 0xf /* CPU0-3 */
34 #define CA7RESCNT_CODE 0x5a5a0000
35 #define CA7RESCNT_CPUS 0xf /* CPU0-3 */
38 #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7792.dtsi39 #clock-cells = <0>;
41 clock-frequency = <0>;
46 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
69 L2_CA15: cache-controller-0 {
80 #clock-cells = <0>;
82 clock-frequency = <0>;
95 #clock-cells = <0>;
97 clock-frequency = <0>;
[all …]
H A Dr8a7794.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
[all …]
H A Dr8a7793.dtsi32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
[all …]
H A Dr8a7791.dtsi40 * The external audio clocks are configured as 0 Hz fixed frequency
46 #clock-cells = <0>;
47 clock-frequency = <0>;
51 #clock-cells = <0>;
52 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
63 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #size-cells = <0>;
[all …]
H A Dr8a7790.dtsi41 * The external audio clocks are configured as 0 Hz fixed frequency
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 clock-frequency = <0>;
64 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7792.dtsi40 #clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
71 L2_CA15: cache-controller-0 {
82 #clock-cells = <0>;
84 clock-frequency = <0>;
97 #clock-cells = <0>;
99 clock-frequency = <0>;
[all …]
H A Dr8a77470.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
32 reg = <0>;
51 L2_CA7: cache-controller-0 {
62 #clock-cells = <0>;
64 clock-frequency = <0>;
77 #clock-cells = <0>;
79 clock-frequency = <0>;
93 reg = <0 0xe6020000 0 0x0c>;
104 reg = <0 0xe6050000 0 0x50>;
[all …]
H A Dr8a7794.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
[all …]
H A Dr8a7793.dtsi32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
[all …]
H A Dr8a7745.dtsi36 * The external audio clocks are configured as 0 Hz fixed
42 #clock-cells = <0>;
43 clock-frequency = <0>;
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
59 #clock-cells = <0>;
61 clock-frequency = <0>;
66 #size-cells = <0>;
[all …]
H A Dr8a7742.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
[all …]
H A Dr8a7791.dtsi40 * The external audio clocks are configured as 0 Hz fixed frequency
46 #clock-cells = <0>;
47 clock-frequency = <0>;
51 #clock-cells = <0>;
52 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
63 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #size-cells = <0>;
[all …]
H A Dr8a7743.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
H A Dr8a7744.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
H A Dr8a7790.dtsi41 * The external audio clocks are configured as 0 Hz fixed frequency
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 clock-frequency = <0>;
64 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #size-cells = <0>;
[all …]