1e2f2594bSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
2a8caad66SGaku Inami /*
3a8caad66SGaku Inami * R-Car Generation 2 Power management support
4a8caad66SGaku Inami *
5a8caad66SGaku Inami * Copyright (C) 2013 - 2015 Renesas Electronics Corporation
6a8caad66SGaku Inami * Copyright (C) 2011 Renesas Solutions Corp.
7a8caad66SGaku Inami * Copyright (C) 2011 Magnus Damm
8a8caad66SGaku Inami */
9a8caad66SGaku Inami
10a8caad66SGaku Inami #include <linux/kernel.h>
1181675696SGeert Uytterhoeven #include <linux/ioport.h>
12a8caad66SGaku Inami #include <linux/of.h>
1381675696SGeert Uytterhoeven #include <linux/of_address.h>
14a8caad66SGaku Inami #include <linux/smp.h>
15a8caad66SGaku Inami #include <asm/io.h>
1601d675f1SFabrizio Castro #include <asm/cputype.h>
17a8caad66SGaku Inami #include "common.h"
18a8caad66SGaku Inami #include "rcar-gen2.h"
19a8caad66SGaku Inami
20a8caad66SGaku Inami /* RST */
21a8caad66SGaku Inami #define RST 0xe6160000
22aa7f39d5SGeert Uytterhoeven
23aa7f39d5SGeert Uytterhoeven #define CA15BAR 0x0020 /* CA15 Boot Address Register */
24aa7f39d5SGeert Uytterhoeven #define CA7BAR 0x0030 /* CA7 Boot Address Register */
25aa7f39d5SGeert Uytterhoeven #define CA15RESCNT 0x0040 /* CA15 Reset Control Register */
26aa7f39d5SGeert Uytterhoeven #define CA7RESCNT 0x0044 /* CA7 Reset Control Register */
27aa7f39d5SGeert Uytterhoeven
28aa7f39d5SGeert Uytterhoeven /* SYS Boot Address Register */
29aa7f39d5SGeert Uytterhoeven #define SBAR_BAREN BIT(4) /* SBAR is valid */
30aa7f39d5SGeert Uytterhoeven
31aa7f39d5SGeert Uytterhoeven /* Reset Control Registers */
32aa7f39d5SGeert Uytterhoeven #define CA15RESCNT_CODE 0xa5a50000
33aa7f39d5SGeert Uytterhoeven #define CA15RESCNT_CPUS 0xf /* CPU0-3 */
34aa7f39d5SGeert Uytterhoeven #define CA7RESCNT_CODE 0x5a5a0000
35aa7f39d5SGeert Uytterhoeven #define CA7RESCNT_CPUS 0xf /* CPU0-3 */
36aa7f39d5SGeert Uytterhoeven
37a8caad66SGaku Inami /* On-chip RAM */
38c94bc815SGeert Uytterhoeven #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
39a8caad66SGaku Inami
phys_to_sbar(phys_addr_t addr)40aa7f39d5SGeert Uytterhoeven static inline u32 phys_to_sbar(phys_addr_t addr)
41aa7f39d5SGeert Uytterhoeven {
42aa7f39d5SGeert Uytterhoeven return (addr >> 8) & 0xfffffc00;
43aa7f39d5SGeert Uytterhoeven }
44aa7f39d5SGeert Uytterhoeven
rcar_gen2_pm_init(void)45a8caad66SGaku Inami void __init rcar_gen2_pm_init(void)
46a8caad66SGaku Inami {
47a8caad66SGaku Inami void __iomem *p;
48a8caad66SGaku Inami u32 bar;
49a8caad66SGaku Inami static int once;
505af5d40cSRob Herring struct device_node *np;
51a8caad66SGaku Inami bool has_a7 = false;
52a8caad66SGaku Inami bool has_a15 = false;
5381675696SGeert Uytterhoeven struct resource res;
5481675696SGeert Uytterhoeven int error;
55a8caad66SGaku Inami
56a8caad66SGaku Inami if (once++)
57a8caad66SGaku Inami return;
58a8caad66SGaku Inami
595af5d40cSRob Herring for_each_of_cpu_node(np) {
60a8caad66SGaku Inami if (of_device_is_compatible(np, "arm,cortex-a15"))
61a8caad66SGaku Inami has_a15 = true;
62a8caad66SGaku Inami else if (of_device_is_compatible(np, "arm,cortex-a7"))
63a8caad66SGaku Inami has_a7 = true;
64a8caad66SGaku Inami }
65a8caad66SGaku Inami
6681675696SGeert Uytterhoeven np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram");
6781675696SGeert Uytterhoeven if (!np) {
6881675696SGeert Uytterhoeven /* No smp-sram in DT, fall back to hardcoded address */
6981675696SGeert Uytterhoeven res = (struct resource)DEFINE_RES_MEM(ICRAM1,
7081675696SGeert Uytterhoeven shmobile_boot_size);
7181675696SGeert Uytterhoeven goto map;
7281675696SGeert Uytterhoeven }
7381675696SGeert Uytterhoeven
7481675696SGeert Uytterhoeven error = of_address_to_resource(np, 0, &res);
75115bbc30SWen Yang of_node_put(np);
7681675696SGeert Uytterhoeven if (error) {
7781675696SGeert Uytterhoeven pr_err("Failed to get smp-sram address: %d\n", error);
7881675696SGeert Uytterhoeven return;
7981675696SGeert Uytterhoeven }
8081675696SGeert Uytterhoeven
8181675696SGeert Uytterhoeven map:
82a8caad66SGaku Inami /* RAM for jump stub, because BAR requires 256KB aligned address */
8381675696SGeert Uytterhoeven if (res.start & (256 * 1024 - 1) ||
8481675696SGeert Uytterhoeven resource_size(&res) < shmobile_boot_size) {
8581675696SGeert Uytterhoeven pr_err("Invalid smp-sram region\n");
8681675696SGeert Uytterhoeven return;
8781675696SGeert Uytterhoeven }
8881675696SGeert Uytterhoeven
8981675696SGeert Uytterhoeven p = ioremap(res.start, resource_size(&res));
9081675696SGeert Uytterhoeven if (!p)
9181675696SGeert Uytterhoeven return;
9201d675f1SFabrizio Castro /*
9301d675f1SFabrizio Castro * install the reset vector, use the largest version if we have enough
9401d675f1SFabrizio Castro * memory available
9501d675f1SFabrizio Castro */
9601d675f1SFabrizio Castro if (resource_size(&res) >= shmobile_boot_size_gen2) {
9701d675f1SFabrizio Castro shmobile_boot_cpu_gen2 = read_cpuid_mpidr();
9801d675f1SFabrizio Castro memcpy_toio(p, shmobile_boot_vector_gen2,
9901d675f1SFabrizio Castro shmobile_boot_size_gen2);
10001d675f1SFabrizio Castro } else {
101a8caad66SGaku Inami memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
10201d675f1SFabrizio Castro }
103a8caad66SGaku Inami iounmap(p);
104a8caad66SGaku Inami
105a8caad66SGaku Inami /* setup reset vectors */
1064bdc0d67SChristoph Hellwig p = ioremap(RST, 0x63);
10781675696SGeert Uytterhoeven bar = phys_to_sbar(res.start);
108a8caad66SGaku Inami if (has_a15) {
109a8caad66SGaku Inami writel_relaxed(bar, p + CA15BAR);
110aa7f39d5SGeert Uytterhoeven writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
111a8caad66SGaku Inami
112a8caad66SGaku Inami /* de-assert reset for CA15 CPUs */
113aa7f39d5SGeert Uytterhoeven writel_relaxed((readl_relaxed(p + CA15RESCNT) &
114aa7f39d5SGeert Uytterhoeven ~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
115aa7f39d5SGeert Uytterhoeven p + CA15RESCNT);
116a8caad66SGaku Inami }
117a8caad66SGaku Inami if (has_a7) {
118a8caad66SGaku Inami writel_relaxed(bar, p + CA7BAR);
119aa7f39d5SGeert Uytterhoeven writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
120a8caad66SGaku Inami
121a8caad66SGaku Inami /* de-assert reset for CA7 CPUs */
122aa7f39d5SGeert Uytterhoeven writel_relaxed((readl_relaxed(p + CA7RESCNT) &
123aa7f39d5SGeert Uytterhoeven ~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
124aa7f39d5SGeert Uytterhoeven p + CA7RESCNT);
125a8caad66SGaku Inami }
126a8caad66SGaku Inami iounmap(p);
127a8caad66SGaku Inami
128a8caad66SGaku Inami shmobile_smp_apmu_suspend_init();
129a8caad66SGaku Inami }
130