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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,davinci-rproc.txt60 reg = <0xc3000000 0x1000000>;
69 reg = <0x11800000 0x40000>,
70 <0x11e00000 0x8000>,
71 <0x11f00000 0x8000>,
72 <0x01c14044 0x4>,
73 <0x01c14174 0x8>;
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsifive,fu740-pcie.yaml94 reg = <0xe 0x00000000 0x0 0x80000000>,
95 <0xd 0xf0000000 0x0 0x10000000>,
96 <0x0 0x100d0000 0x0 0x1000>;
100 bus-range = <0x0 0xff>;
101 ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
102 <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
103 <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
104 … <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
105 num-lanes = <0x8>;
109 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dda850-lcdk.dts25 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
26 reg = <0xc0000000 0x08000000>;
36 reg = <0xc3000000 0x1000000>;
89 #size-cells = <0>;
93 #size-cells = <0>;
95 port@0 {
96 reg = <0>;
136 0x00 0x00101010 0x00f0f0f0
138 0x04 0x00000110 0x00000ff0
144 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
[all …]
/openbmc/u-boot/board/freescale/mpc8610hpcd/
H A Dmpc8610hpcd.c34 gur->gpiocr |= 0x88aa5500; /* DIU16, IR1, UART0, UART2 */ in board_early_init_f()
36 return 0; in board_early_init_f()
46 out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80); in misc_init_r()
48 /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ in misc_init_r()
50 if(version >= 0x07) { in misc_init_r()
52 out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf); in misc_init_r()
56 * Enable the TFP410 Encoder (I2C address 0x38) in misc_init_r()
59 tmp_val = 0xBF; in misc_init_r()
60 i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); in misc_init_r()
62 tmp_val = 0; in misc_init_r()
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-lcdk.dts24 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
25 reg = <0xc0000000 0x08000000>;
35 reg = <0xc3000000 0x1000000>;
122 #size-cells = <0>;
126 #size-cells = <0>;
128 port@0 {
129 reg = <0>;
205 0x00 0x00101010 0x00f0f0f0
207 0x04 0x00000110 0x00000ff0
213 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
[all …]
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
32 reg = <0x0>;
56 reg = <0x1>;
80 reg = <0x2>;
104 reg = <0x3>;
128 reg = <0x4>;
169 #address-cells = <0>;
170 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
171 reg = <0x0 0xc000000 0x0 0x4000000>;
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip06.dtsi23 #size-cells = <0>;
87 reg = <0x10000>;
95 reg = <0x10001>;
103 reg = <0x10002>;
111 reg = <0x10003>;
119 reg = <0x10100>;
127 reg = <0x10101>;
135 reg = <0x10102>;
143 reg = <0x10103>;
151 reg = <0x10200>;
[all …]
H A Dhip07.dtsi23 #size-cells = <0>;
270 reg = <0x10000>;
273 numa-node-id = <0>;
279 reg = <0x10001>;
282 numa-node-id = <0>;
288 reg = <0x10002>;
291 numa-node-id = <0>;
297 reg = <0x10003>;
300 numa-node-id = <0>;
306 reg = <0x10100>;
[all …]
/openbmc/linux/arch/m68k/fpsp040/
H A Dres_func.S28 sp_bnds: .short 0x3f81,0x407e
29 .short 0x3f6a,0x0000
30 dp_bnds: .short 0x3c01,0x43fe
31 .short 0x3bcd,0x0000
73 bfclr LOCAL_SGN(%a0){#0:#8} |change back to IEEE ext format
77 bfclr DTAG(%a6){#0:#4} |set tag to normalized, FPTE15 = 0
79 orb #0x0f,DNRM_FLG(%a6)
85 | At this point, only opclass 0 and 2 possible
100 andil #0x7f,%d0 |strip to only command word
107 btstl #0,%d0
[all …]