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/openbmc/qemu/tests/qemu-iotests/tests/
H A Dzoned.out5 start: 0x0, len 0x80000, cap 0x80000, wptr 0x0, zcond:1, [type: 2]
8 start: 0x0, len 0x80000, cap 0x80000, wptr 0x0, zcond:1, [type: 2]
9 start: 0x80000, len 0x80000, cap 0x80000, wptr 0x80000, zcond:1, [type: 2]
10 start: 0x100000, len 0x80000, cap 0x80000, wptr 0x100000, zcond:1, [type: 2]
11 start: 0x180000, len 0x80000, cap 0x80000, wptr 0x180000, zcond:1, [type: 2]
12 start: 0x200000, len 0x80000, cap 0x80000, wptr 0x200000, zcond:1, [type: 2]
13 start: 0x280000, len 0x80000, cap 0x80000, wptr 0x280000, zcond:1, [type: 2]
14 start: 0x300000, len 0x80000, cap 0x80000, wptr 0x300000, zcond:1, [type: 2]
15 start: 0x380000, len 0x80000, cap 0x80000, wptr 0x380000, zcond:1, [type: 2]
16 start: 0x400000, len 0x80000, cap 0x80000, wptr 0x400000, zcond:1, [type: 2]
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2_special_blocks.h16 { GAUDI2_BLOCK_TYPE_TPC, 0xfc008000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
17 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00a000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
18 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00b000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
19 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00c000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
20 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc080000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
21 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc081000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
22 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc083000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
23 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc084000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
24 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c8000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \
25 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c9000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-ls2080a.dtsi16 reg = <0x00000000 0x80000000 0 0x80000000>;
22 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
26 interrupts = <1 9 0x4>;
31 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
32 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
33 <1 11 0x8>, /* Virtual PPI, active-low */
34 <1 10 0x8>; /* Hypervisor PPI, active-low */
40 reg = <0x0 0x21c0500 0x0 0x100>;
41 clock-frequency = <0>; /* Updated by bootloader */
[all …]
H A Dfsl-ls1088a.dtsi16 reg = <0x00000000 0x80000000 0 0x80000000>;
22 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
26 interrupts = <1 9 0x4>;
31 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
32 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
33 <1 11 0x8>, /* Virtual PPI, active-low */
34 <1 10 0x8>; /* Hypervisor PPI, active-low */
40 reg = <0x0 0x21c0500 0x0 0x100>;
41 clock-frequency = <0>; /* Updated by bootloader */
[all …]
H A Domap3-evm-37xx.dts21 pinctrl-0 = <&hsusb2_2_pins>;
27 OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
30 OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
39 OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
42 OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
45 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
48 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
51 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
54 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
60 nand@0,0 {
[all …]
H A Dkeystone-k2l-evm.dts22 #clock-cells = <0>;
42 reg = <0x50>;
53 ti,cs-chipselect = <0>;
63 nand@0,0 {
67 reg = <0 0 0x4000000
68 1 0 0x0000100>;
70 ti,davinci-chipselect = <0>;
71 ti,davinci-mask-ale = <0x2000>;
72 ti,davinci-mask-cle = <0x4000>;
73 ti,davinci-mask-chipsel = <0>;
[all …]
H A Dkeystone-k2e-evm.dts23 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #clock-cells = <0>;
65 reg = <0x50>;
76 ti,cs-chipselect = <0>;
86 nand@0,0 {
90 reg = <0 0 0x4000000
91 1 0 0x0000100>;
93 ti,davinci-chipselect = <0>;
94 ti,davinci-mask-ale = <0x2000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-apf28.dts15 reg = <0x40000000 0x08000000>;
21 pinctrl-0 = <&duart_pins_a>;
27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
30 partition@0 {
32 reg = <0x0 0x300000>;
37 reg = <0x300000 0x80000>;
42 reg = <0x380000 0x80000>;
47 reg = <0x400000 0x80000>;
52 reg = <0x480000 0x80000>;
57 reg = <0x500000 0x800000>;
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_cfg_masks.h23 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW_V_SHIFT 0
24 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW_V_MASK 0xFFFFFFFF
27 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH_V_SHIFT 0
28 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH_V_MASK 0xFFFFFFFF
31 #define TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE_V_SHIFT 0
32 #define TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE_V_MASK 0xFFFFFFFF
35 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_DATA_TYPE_SHIFT 0
36 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_DATA_TYPE_MASK 0x7
38 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_VALID_DIM_MASK_MASK 0x1F00
40 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_LAST_DIM_MASK 0x70000
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27-apf27.dts18 reg = <0xa0000000 0x04000000>;
23 clock-frequency = <0>;
30 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
31 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
32 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
33 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
34 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
35 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
36 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
37 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Dibm-power10-dual.dtsi8 #size-cells = <0>;
10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
12 cfam@0,0 {
13 reg = <0 0>;
16 chip-id = <0>;
20 reg = <0x1000 0x400>;
25 reg = <0x1800 0x400>;
27 #size-cells = <0>;
29 cfam0_i2c0: i2c-bus@0 {
31 #size-cells = <0>;
[all …]
/openbmc/linux/arch/mips/include/asm/ip32/
H A Dmace.h18 #define MACE_BASE 0x1f000000 /* physical */
43 #define MACEPCI_ERROR_DEVSEL_MASK 0xc0
44 #define MACEPCI_ERROR_DEVSEL_FAST 0
45 #define MACEPCI_ERROR_DEVSEL_MED 0x40
46 #define MACEPCI_ERROR_DEVSEL_SLOW 0x80
48 #define MACEPCI_ERROR_66MHZ BIT(0)
51 #define MACEPCI_CONTROL_INT_MASK 0xff
61 #define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
71 unsigned int _pad[0xcf8/4 - 4];
79 #define MACEPCI_LOW_MEMORY 0x1a000000
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-nor.dtso13 fragment@0 {
17 #size-cells = <0>;
18 flash@0 {
20 reg = <0>;
28 partition@0 {
30 reg = <0x0 0x40000>;
36 reg = <0x40000 0x40000>;
41 reg = <0x80000 0x80000>;
46 reg = <0x100000 0x80000>;
52 reg = <0x180000 0xa80000>;
[all …]
/openbmc/u-boot/doc/device-tree-bindings/mailbox/
H A Dk3-secure-proxy.txt24 reg = <0x2a380000 0x80000>,
25 <0x2a400000 0x80000>,
26 <0x2a480000 0x80000>;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3430-sdp.dts15 reg = <0x80000000 0x10000000>; /* 256 MB */
23 reg = <0x48>;
50 ranges = <0 0 0x10000000 0x08000000>,
51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */
54 nor@0,0 {
59 reg = <0 0 0x08000000>;
63 gpmc,cs-on-ns = <0>;
84 partition@0 {
86 reg = <0 0x40000>;
[all …]
H A Dam57-pruss.dtsi11 reg = <0x4b226000 0x4>,
12 <0x4b226004 0x4>;
23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>;
27 ranges = <0x00000000 0x4b200000 0x80000>;
29 pruss1: pruss@0 {
31 reg = <0x0 0x80000>;
36 pruss1_mem: memories@0 {
37 reg = <0x0 0x2000>,
38 <0x2000 0x2000>,
39 <0x10000 0x8000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi10 #clock-cells = <0>;
17 #clock-cells = <0>;
24 #clock-cells = <0>;
31 #clock-cells = <0>;
38 reg = <0 0xe0700000 0 0x80000>,
39 <0 0xe0780000 0 0x80000>,
40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */
42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */
43 interrupts = <0 325 4>,
[all …]
/openbmc/u-boot/board/freescale/mpc8315erdb/
H A DREADME8 To boot the image at 0xFE000000 in NOR flash, use these DIP
33 0x0000_0000 0x07ff_ffff DDR 128M
34 0x8000_0000 0x8fff_ffff PCI MEM 256M
35 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
36 0xe000_0000 0xe00f_ffff IMMR 1M
37 0xe030_0000 0xe03f_ffff PCI IO 1M
38 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K
39 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
83 =>nand erase 0 0x80000
84 =>nand write $loadaddr 0 0x80000
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm958625-meraki-mx6x-common.dtsi55 reg = <0x50>;
62 reg = <0x66 0x6>;
68 nand@0 {
70 reg = <0>;
81 partition@0 {
83 reg = <0x0 0x80000>;
89 reg = <0x80000 0x80000>;
95 reg = <0x100000 0x300000>;
100 reg = <0x400000 0x100000>;
105 reg = <0x500000 0x300000>;
[all …]
/openbmc/u-boot/include/configs/
H A Dxilinx_zynqmp.h19 #define GICD_BASE 0xF9010000
20 #define GICC_BASE 0xF9020000
23 # define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
26 #define CONFIG_SYS_MEMTEST_START 0
37 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
64 #define CONFIG_SYS_LOAD_ADDR 0x8000000
67 #define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
75 "system.dtb ram $fdt_addr $fdt_size\0" \
76 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
77 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
[all …]
H A Dwoodburn_sd.h22 #define CONFIG_SPL_TEXT_BASE 0x10002300
26 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
27 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
28 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
29 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
H A Dtam3517-common.h63 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
65 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
87 0x01F00000) /* 31MB */
114 #define CONFIG_ENV_OFFSET 0x180000
115 #define CONFIG_ENV_ADDR 0x180000
121 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
122 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
139 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
145 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
150 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
[all …]
/openbmc/u-boot/configs/
H A Diconnect_defconfig3 CONFIG_SYS_TEXT_BASE=0x600000
20 CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x80000@0x0(uboot),0x20000@0x80000(uboot_env),-@0xa000…
/openbmc/u-boot/board/freescale/mpc8313erdb/
H A DREADME8 To boot the image at 0xFE000000 in NOR flash, use these DIP
33 0x0000_0000 0x07ff_ffff DDR 128M
34 0x8000_0000 0x8fff_ffff PCI MEM 256M
35 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
36 0xe000_0000 0xe00f_ffff IMMR 1M
37 0xe200_0000 0xe20f_ffff PCI IO 16M
38 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
39 0xf000_0000 0xf001_ffff VSC7385 (CS2) 128K
40 0xfa00_0000 0xfa00_7fff Board Status/ 32K
42 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dmcu.h12 #define MT_MCU_CPU_CTL 0x0704
13 #define MT_MCU_CLOCK_CTL 0x0708
14 #define MT_MCU_PCIE_REMAP_BASE1 0x0740
15 #define MT_MCU_PCIE_REMAP_BASE2 0x0744
16 #define MT_MCU_PCIE_REMAP_BASE3 0x0748
18 #define MT_MCU_ROM_PATCH_OFFSET 0x80000
19 #define MT_MCU_ROM_PATCH_ADDR 0x90000
21 #define MT_MCU_ILM_OFFSET 0x80000
23 #define MT_MCU_DLM_OFFSET 0x100000
24 #define MT_MCU_DLM_ADDR 0x90000
[all …]

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