Home
last modified time | relevance | path

Searched +full:0 +full:x34000000 (Results 1 – 25 of 38) sorted by relevance

12

/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-s8815.dts28 gpios = <16 0x0>;
43 pinctrl-0 = <&cd_default_mode>;
59 ste,input = <0>;
64 ste,output = <0>;
72 ste,input = <0>;
88 ste,input = <0>;
97 reg = <0x34000000 0x1000000>;
100 ranges = <0 0x34000000 0x1000000>;
103 reg = <0x300 0x0fd00>;
113 reg = <0x1d>;
[all …]
H A Dste-nomadik-nhk15.dts40 ste,input = <0>;
52 ste,input = <0>;
64 ste,input = <0>;
78 reg = <0x34000000 0x1000000>;
81 ranges = <0 0x34000000 0x1000000>;
84 reg = <0x300 0x0fd00>;
98 pinctrl-0 = <&lis3lv02dl_nhk_mode>;
100 reg = <0x1d>;
104 reg = <0x43>;
110 pinctrl-0 = <&stmpe2401_1_nhk_mode>;
[all …]
/openbmc/linux/arch/sh/include/mach-se/mach/
H A Dse7206.h5 #define PA_SMSC 0x30000000
6 #define PA_MRSHPC 0x34000000
7 #define PA_LED 0x31400000
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dintel,keembay-dwc3.yaml40 "^usb@[0-9a-f]+$":
73 reg = <0x34000000 0x10000>;
/openbmc/qemu/hw/arm/
H A Dversatilepb.c31 #define VERSATILE_FLASH_ADDR 0x34000000
68 qemu_set_irq(s->parent[s->irq], flags != 0); in vpb_sic_update()
80 qemu_set_irq(s->parent[i], (s->level & mask) != 0); in vpb_sic_update_pic()
102 case 0: /* STATUS */ in vpb_sic_read()
113 printf ("vpb_sic_read: Bad register offset 0x%x\n", (int)offset); in vpb_sic_read()
114 return 0; in vpb_sic_read()
139 s->pic_enable |= (value & 0x7fe00000); in vpb_sic_write()
147 printf ("vpb_sic_write: Bad register offset 0x%x\n", (int)offset); in vpb_sic_write()
167 for (i = 0; i < 32; i++) { in vpb_sic_init()
172 "vpb-sic", 0x1000); in vpb_sic_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/ti/
H A Dk3-udma.yaml56 for source thread IDs (rx): 0 - 0x7fff
57 for destination thread IDs (tx): 0x8000 - 0xffff
153 ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>;
159 reg = <0x0 0x31150000 0x0 0x100>,
160 <0x0 0x34000000 0x0 0x100000>,
161 <0x0 0x35000000 0x0 0x100000>;
172 ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
173 <0x2>; /* TX_CHAN */
174 ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
175 <0x5>; /* RX_CHAN */
[all …]
/openbmc/qemu/include/hw/arm/
H A Dfsl-imx7.h100 FSL_IMX7_MMDC_ADDR = 0x80000000,
103 FSL_IMX7_QSPI1_MEM_ADDR = 0x60000000,
106 FSL_IMX7_PCIE1_MEM_ADDR = 0x40000000,
109 FSL_IMX7_QSPI1_RX_BUF_ADDR = 0x34000000,
113 FSL_IMX7_PCIE_REG_ADDR = 0x33800000,
116 FSL_IMX7_DMA_APBH_ADDR = 0x33000000,
117 FSL_IMX7_DMA_APBH_SIZE = 0x8000,
120 FSL_IMX7_GPV6_ADDR = 0x32600000,
121 FSL_IMX7_GPV5_ADDR = 0x32500000,
122 FSL_IMX7_GPV4_ADDR = 0x32400000,
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm11351.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 secondary-boot-reg = <0x3500417c>;
41 #address-cells = <0>;
43 reg = <0x3ff01000 0x1000>,
44 <0x3ff00100 0x100>;
49 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
54 reg = <0x3e000000 0x1000>;
64 reg = <0x3e001000 0x1000>;
[all …]
H A Dbcm23550.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
60 secondary-boot-reg = <0x35004178>;
69 secondary-boot-reg = <0x35004178>;
78 secondary-boot-reg = <0x35004178>;
87 ranges = <0 0x34000000 0x102f83ac>;
93 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
98 reg = <0x01001f00 0x24>;
103 reg = <0x01003000 0x524>;
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dcpu.c20 #define DCSR_RCPM2_BLOCK_OFFSET 0x223000
21 #define DCSR_RCPM2_CPMFSMCR0 0x400
22 #define DCSR_RCPM2_CPMFSMSR0 0x404
23 #define DCSR_RCPM2_CPMFSMCR1 0x414
24 #define DCSR_RCPM2_CPMFSMSR1 0x418
25 #define CPMFSMSR_FSM_STATE_MASK 0x7f
33 * and bit[0] indicates whether the descriptor is valid.
35 #define PMD_TYPE_TABLE 0x3
36 #define PMD_TYPE_SECT 0x1
38 /* AttrIndx[2:0] */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dls1021a.dtsi27 #size-cells = <0>;
32 reg = <0xf00>;
39 reg = <0xf01>;
70 reg = <0x1401000 0x1000>,
71 <0x1402000 0x1000>,
72 <0x1404000 0x2000>,
73 <0x1406000 0x2000>;
80 reg = <0x1530000 0x10000>;
86 reg = <0x1ee0000 0x10000>;
92 reg = <0x1560000 0x10000>;
[all …]
H A Drk3399-sdram-ddr3-1866.dtsi8 0x1
9 0xa
10 0x3
11 0x2
12 0x1
13 0x0
14 0xf
15 0xf
17 0x80181219
18 0x17050a03
[all …]
H A Drk3399-sdram-ddr3-1333.dtsi8 0x1
9 0xa
10 0x3
11 0x2
12 0x1
13 0x0
14 0xf
15 0xf
17 0x80120e12
18 0x11030802
[all …]
H A Drk3399-sdram-ddr3-1600.dtsi8 0x1
9 0xa
10 0x3
11 0x2
12 0x1
13 0x0
14 0xf
15 0xf
17 0x80151015
18 0x14040902
[all …]
H A Drk3399-sdram-lpddr3-4GB-1600.dtsi8 0x2
9 0xa
10 0x3
11 0x2
12 0x2
13 0x0
14 0xf
15 0xf
17 0x1d191519
18 0x14040808
[all …]
H A Drk3399-sdram-lpddr3-2GB-1600.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x2
14 0x0
15 0xf
16 0xf
18 0x1d191519
19 0x14040808
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dversatile-ab.dts24 reg = <0x0 0x08000000>;
28 #clock-cells = <0>;
36 #size-cells = <0>;
40 #size-cells = <0>;
42 port@0 {
43 reg = <0>;
72 reg = <0x10000000 0x200>;
73 ranges = <0x0 0x10000000 0x200>;
77 led@8,0 {
79 reg = <0x08 0x04>;
[all …]
/openbmc/qemu/contrib/plugins/
H A Dhowvec.c25 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
62 * 31..28 27..24 23..20 19..16 15..12 11..8 7..4 3..0
66 { " UDEF", "udef", 0xffff0000, 0x00000000, COUNT_NONE},
67 { " SVE", "sve", 0x1e000000, 0x04000000, COUNT_CLASS},
68 { "Reserved", "res", 0x1e000000, 0x00000000, COUNT_CLASS},
70 { " PCrel addr", "pcrel", 0x1f000000, 0x10000000, COUNT_CLASS},
71 { " Add/Sub (imm,tags)", "asit", 0x1f800000, 0x11800000, COUNT_CLASS},
72 { " Add/Sub (imm)", "asi", 0x1f000000, 0x11000000, COUNT_CLASS},
73 { " Logical (imm)", "logi", 0x1f800000, 0x12000000, COUNT_CLASS},
74 { " Move Wide (imm)", "movwi", 0x1f800000, 0x12800000, COUNT_CLASS},
[all …]
/openbmc/u-boot/drivers/pci/
H A Dpcie_aspeed.c21 u32 timeout = 0; in aspeed_pcie_set_slot_power_limit()
26 case 0: in aspeed_pcie_set_slot_power_limit()
36 txTag %= 0x7; in aspeed_pcie_set_slot_power_limit()
38 writel(0x74000001, &h2x_reg->h2x_tx_desc3); in aspeed_pcie_set_slot_power_limit()
40 case 0: //write for 0.8.0 in aspeed_pcie_set_slot_power_limit()
41 writel(0x00400050 | (txTag << 8), &h2x_reg->h2x_tx_desc2); in aspeed_pcie_set_slot_power_limit()
43 case 1: //write for 0.4.0 in aspeed_pcie_set_slot_power_limit()
44 writel(0x00200050 | (txTag << 8), &h2x_reg->h2x_tx_desc2); in aspeed_pcie_set_slot_power_limit()
47 writel(0x0, &h2x_reg->h2x_tx_desc1); in aspeed_pcie_set_slot_power_limit()
48 writel(0x0, &h2x_reg->h2x_tx_desc0); in aspeed_pcie_set_slot_power_limit()
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/openbmc/qemu/disas/
H A Dhppa.c50 #define PA_PAGESIZE 0x1000
59 R_HPPA_FSEL = 0x0,
60 R_HPPA_LSSEL = 0x1,
61 R_HPPA_RSSEL = 0x2,
62 R_HPPA_LSEL = 0x3,
63 R_HPPA_RSEL = 0x4,
64 R_HPPA_LDSEL = 0x5,
65 R_HPPA_RDSEL = 0x6,
66 R_HPPA_LRSEL = 0x7,
67 R_HPPA_RRSEL = 0x8,
[all …]
H A Dmicroblaze.c137 /* gen purpose regs go from 0 to 31 */
140 #define REG_PC_MASK 0x8000
141 #define REG_MSR_MASK 0x8001
142 #define REG_EAR_MASK 0x8003
143 #define REG_ESR_MASK 0x8005
144 #define REG_FSR_MASK 0x8007
145 #define REG_BTR_MASK 0x800b
146 #define REG_EDR_MASK 0x800d
147 #define REG_PVR_MASK 0xa000
149 #define REG_PID_MASK 0x9000
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]

12