Searched +full:0 +full:x32400000 (Results 1 – 12 of 12) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | ti,secure-proxy.yaml | 22 pattern: "^mailbox@[0-9a-f]+$" 45 pattern: "^rx_[0-9]{3}$" 74 reg = <0x32c00000 0x100000>, 75 <0x32400000 0x100000>, 76 <0x32800000 0x100000>;
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/openbmc/u-boot/include/configs/ |
H A D | poplar.h | 20 #define CONFIG_SYS_INIT_SP_ADDR 0x200000 21 #define CONFIG_SYS_LOAD_ADDR 0x800000 34 func(USB, usb, 0) \ 35 func(MMC, mmc, 0) \ 42 "loader_mmc_blknum=0x0\0" \ 43 "loader_mmc_nblks=0x780\0" \ 44 "env_mmc_blknum=0xf80\0" \ 45 "env_mmc_nblks=0x80\0" \ 46 "kernel_addr_r=0x30000000\0" \ 47 "pxefile_addr_r=0x32000000\0" \ [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | k3-am65-main.dtsi | 16 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ 17 <0x00 0x01880000 0x00 0x90000>; /* GICR */ 26 reg = <0x00 0x01820000 0x00 0x10000>; 36 reg = <0x00 0x32c00000 0x00 0x100000>, 37 <0x00 0x32400000 0x00 0x100000>, 38 <0x00 0x32800000 0x00 0x100000>; 45 reg = <0x00 0x02800000 0x00 0x100>; 55 reg = <0x00 0x02810000 0x00 0x100>; 65 reg = <0x00 0x02820000 0x00 0x100>;
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/openbmc/qemu/include/hw/arm/ |
H A D | fsl-imx7.h | 100 FSL_IMX7_MMDC_ADDR = 0x80000000, 103 FSL_IMX7_QSPI1_MEM_ADDR = 0x60000000, 106 FSL_IMX7_PCIE1_MEM_ADDR = 0x40000000, 109 FSL_IMX7_QSPI1_RX_BUF_ADDR = 0x34000000, 113 FSL_IMX7_PCIE_REG_ADDR = 0x33800000, 116 FSL_IMX7_DMA_APBH_ADDR = 0x33000000, 117 FSL_IMX7_DMA_APBH_SIZE = 0x8000, 120 FSL_IMX7_GPV6_ADDR = 0x32600000, 121 FSL_IMX7_GPV5_ADDR = 0x32500000, 122 FSL_IMX7_GPV4_ADDR = 0x32400000, [all …]
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/openbmc/linux/arch/hexagon/kernel/ |
H A D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages. 46 /* VA 0x00000000 */ 59 /* VA 0x40000000 */ 68 /* VA 0x80000000 */ 74 /*0xa8*/.word X,X,X,X 77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000) 79 /*0xa9*/.word X,X,X,X 81 /*0xaa*/.word X,X,X,X 82 /*0xab*/.word X,X,X,X 83 /*0xac*/.word X,X,X,X [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-mx7/ |
H A D | imx-regs.h | 11 #define ROM_SW_INFO_ADDR 0x000001E8 12 #define ROMCP_ARB_BASE_ADDR 0x00000000 13 #define ROMCP_ARB_END_ADDR 0x00017FFF 15 #define CAAM_ARB_BASE_ADDR 0x00100000 16 #define CAAM_ARB_END_ADDR 0x00107FFF 17 #define GIC400_ARB_BASE_ADDR 0x31000000 18 #define GIC400_ARB_END_ADDR 0x31007FFF 19 #define APBH_DMA_ARB_BASE_ADDR 0x33000000 20 #define APBH_DMA_ARB_END_ADDR 0x33007FFF 21 #define M4_BOOTROM_BASE_ADDR 0x00180000 [all …]
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/openbmc/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j7200-main.dtsi | 10 #clock-cells = <0>; 18 reg = <0x00 0x70000000 0x00 0x100000>; 21 ranges = <0x00 0x00 0x70000000 0x100000>; 23 atf-sram@0 { 24 reg = <0x00 0x20000>; 30 reg = <0x00 0x00100000 0x00 0x1c000>; 33 ranges = <0x00 0x00 0x00100000 0x1c000>; 38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 39 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ 45 reg = <0x4044 0x10>; [all …]
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H A D | k3-am65-main.dtsi | 12 reg = <0x0 0x70000000 0x0 0x200000>; 15 ranges = <0x0 0x0 0x70000000 0x200000>; 17 atf-sram@0 { 18 reg = <0x0 0x20000>; 22 reg = <0xf0000 0x10000>; 26 reg = <0x100000 0x100000>; 37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ 38 <0x00 0x01880000 0x00 0x90000>, /* GICR */ 39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */ 40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */ [all …]
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H A D | k3-j784s4-main.dtsi | 11 reg = <0x00 0x70000000 0x00 0x800000>; 14 ranges = <0x00 0x00 0x70000000 0x800000>; 16 atf-sram@0 { 17 reg = <0x00 0x20000>; 21 reg = <0x1f0000 0x10000>; 25 reg = <0x200000 0x200000>; 36 reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */ 37 <0x00 0x01900000 0x00 0x100000>, /* GICR */ 38 <0x00 0x6f000000 0x00 0x2000>, /* GICC */ 39 <0x00 0x6f010000 0x00 0x1000>, /* GICH */ [all …]
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H A D | k3-j721s2-main.dtsi | 13 #clock-cells = <0>; 15 clock-frequency = <0>; 22 reg = <0x0 0x70000000 0x0 0x400000>; 25 ranges = <0x0 0x0 0x70000000 0x400000>; 27 atf-sram@0 { 28 reg = <0x0 0x20000>; 32 reg = <0x1f0000 0x10000>; 36 reg = <0x200000 0x200000>; 42 reg = <0x00 0x00104000 0x00 0x18000>; 45 ranges = <0x00 0x00 0x00104000 0x18000>; [all …]
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H A D | k3-j721e-main.dtsi | 15 #clock-cells = <0>; 17 clock-frequency = <0>; 21 #clock-cells = <0>; 23 clock-frequency = <0>; 30 reg = <0x0 0x70000000 0x0 0x800000>; 33 ranges = <0x0 0x0 0x70000000 0x800000>; 35 atf-sram@0 { 36 reg = <0x0 0x20000>; 42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */ 45 ranges = <0x0 0x0 0x00100000 0x1c000>; [all …]
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/openbmc/qemu/tcg/loongarch64/ |
H A D | tcg-insn-defs.c.inc | 12 OPC_MOVGR2SCR = 0x00000800, 13 OPC_MOVSCR2GR = 0x00000c00, 14 OPC_CLZ_W = 0x00001400, 15 OPC_CTZ_W = 0x00001c00, 16 OPC_CLZ_D = 0x00002400, 17 OPC_CTZ_D = 0x00002c00, 18 OPC_REVB_2H = 0x00003000, 19 OPC_REVB_2W = 0x00003800, 20 OPC_REVB_D = 0x00003c00, 21 OPC_SEXT_H = 0x00005800, [all …]
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