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/openbmc/u-boot/include/net/pfe_eth/pfe/
H A Dcbus.h22 #define EMAC1_BASE_ADDR (CBUS_BASE_ADDR + 0x200000)
23 #define EGPI1_BASE_ADDR (CBUS_BASE_ADDR + 0x210000)
24 #define EMAC2_BASE_ADDR (CBUS_BASE_ADDR + 0x220000)
25 #define EGPI2_BASE_ADDR (CBUS_BASE_ADDR + 0x230000)
26 #define BMU1_BASE_ADDR (CBUS_BASE_ADDR + 0x240000)
27 #define BMU2_BASE_ADDR (CBUS_BASE_ADDR + 0x250000)
28 #define ARB_BASE_ADDR (CBUS_BASE_ADDR + 0x260000)
29 #define DDR_CONFIG_BASE_ADDR (CBUS_BASE_ADDR + 0x270000)
30 #define HIF_BASE_ADDR (CBUS_BASE_ADDR + 0x280000)
31 #define HGPI_BASE_ADDR (CBUS_BASE_ADDR + 0x290000)
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dmscc,luton.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
43 ranges = <0 0x60000000 0x10200000>;
46 pinctrl-0 = <&uart_pins>;
50 reg = <0x10100000 0x20>;
60 reg = <0x70068 0x68>;
63 gpio-ranges = <&gpio 0 0 32>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml32 - phy-mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
33 - phy-mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
34 - phy-mode = "1000base-x": on ports 0, 1, 2, 3, 4, 5, 6, 7
41 node bindings, describing it as PF 5 of device 0, bus 0.
45 EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc
51 - phy-mode = "sgmii": on ports 0, 1, 2, 3
52 - phy-mode = "qsgmii": on ports 0, 1, 2, 3
53 - phy-mode = "usxgmii": on ports 0, 1, 2, 3
54 - phy-mode = "1000base-x": on ports 0, 1, 2, 3
55 - phy-mode = "2500base-x": on ports 0, 1, 2, 3
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dmpc8308rdb.dts26 #size-cells = <0>;
28 PowerPC,8308@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-ap806.dtsi73 reg = <0x0 0x4000000 0x0 0x200000>;
89 ranges = <0x0 0x0 0xf0000000 0x1000000>;
99 reg = <0x210000 0x10000>,
100 <0x220000 0x20000>,
101 <0x240000 0x20000>,
102 <0x260000 0x20000>;
107 reg = <0x280000 0x1000>;
114 reg = <0x290000 0x1000>;
121 reg = <0x2a0000 0x1000>;
128 reg = <0x2b0000 0x1000>;
[all …]
/openbmc/linux/drivers/net/dsa/xrs700x/
H A Dxrs700x_reg.h4 #define XRS_DEVICE_ID_BASE 0x0
5 #define XRS_GPIO_BASE 0x10000
6 #define XRS_PORT_OFFSET 0x10000
7 #define XRS_PORT_BASE(x) (0x200000 + XRS_PORT_OFFSET * (x))
8 #define XRS_RTC_BASE 0x280000
9 #define XRS_TS_OFFSET 0x8000
10 #define XRS_TS_BASE(x) (0x290000 + XRS_TS_OFFSET * (x))
11 #define XRS_SWITCH_CONF_BASE 0x300000
14 #define XRS_DEV_ID0 (XRS_DEVICE_ID_BASE + 0)
21 #define XRS_CONFIG0 (XRS_GPIO_BASE + 0x1000)
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
62 ranges = <0x0 0x0 0xf0000000 0x1000000>;
66 reg = <0x100000 0x100000>;
90 reg = <0x210000 0x10000>,
91 <0x220000 0x20000>,
92 <0x240000 0x20000>,
93 <0x260000 0x20000>;
98 reg = <0x280000 0x1000>;
105 reg = <0x290000 0x1000>;
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dcs47l24.c41 { .type = WMFW_ADSP2_PM, .base = 0x200000 },
42 { .type = WMFW_ADSP2_ZM, .base = 0x280000 },
43 { .type = WMFW_ADSP2_XM, .base = 0x290000 },
44 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 },
48 { .type = WMFW_ADSP2_PM, .base = 0x300000 },
49 { .type = WMFW_ADSP2_ZM, .base = 0x380000 },
50 { .type = WMFW_ADSP2_XM, .base = 0x390000 },
51 { .type = WMFW_ADSP2_YM, .base = 0x3a8000 },
68 if (ret != 0) { in cs47l24_adsp_power_ev()
80 static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
[all …]
H A Dwm5110.c49 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
50 { .type = WMFW_ADSP2_ZM, .base = 0x180000 },
51 { .type = WMFW_ADSP2_XM, .base = 0x190000 },
52 { .type = WMFW_ADSP2_YM, .base = 0x1a8000 },
56 { .type = WMFW_ADSP2_PM, .base = 0x200000 },
57 { .type = WMFW_ADSP2_ZM, .base = 0x280000 },
58 { .type = WMFW_ADSP2_XM, .base = 0x290000 },
59 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 },
63 { .type = WMFW_ADSP2_PM, .base = 0x300000 },
64 { .type = WMFW_ADSP2_ZM, .base = 0x380000 },
[all …]
/openbmc/linux/drivers/mfd/
H A Dwm5110-tables.c22 { 0x80, 0x3 },
23 { 0x44, 0x20 },
24 { 0x45, 0x40 },
25 { 0x46, 0x60 },
26 { 0x47, 0x80 },
27 { 0x48, 0xa0 },
28 { 0x51, 0x13 },
29 { 0x52, 0x33 },
30 { 0x53, 0x53 },
31 { 0x54, 0x73 },
[all …]
H A Dcs47l24-tables.c21 { 0x80, 0x3 },
22 { 0x27C, 0x0010 },
23 { 0x221, 0x0070 },
24 { 0x80, 0x0 },
36 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
37 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
183 { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */
184 { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */
185 { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */
186 { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */
[all …]