Home
last modified time | relevance | path

Searched +full:0 +full:x260 (Results 1 – 25 of 234) sorted by relevance

12345678910

/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dbrcm,sdhci-brcmstb.yaml91 reg = <0x84b0000 0x260>, <0x84b0300 0x200>;
97 interrupts = <0x0 0x26 0x4>;
106 reg = <0x84b1000 0x260>, <0x84b1300 0x200>;
114 bus-width = <0x8>;
115 interrupts = <0x0 0x27 0x4>;
/openbmc/linux/Documentation/networking/device_drivers/appletalk/
H A Dcops.rst38 If you do not specify any options the driver will try and use the IO = 0x240,
43 insmod cops io=0x240 irq=5
44 insmod -o cops2 cops io=0x260 irq=3
48 append="ether=5,0x240,lt0 ether=3,0x260,lt1"
55 RX packets:0 errors:0 dropped:0 overruns:0 frame:0
56 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 coll:0
/openbmc/linux/sound/isa/gus/
H A Dgusextreme.c31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
34 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
35 static long gf1_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x210,0x220,0x230,0x240,0x…
36 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x300,0x310,0x320 */
40 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */
42 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
43 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
44 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24};
45 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
85 static const long possible_ports[] = {0x220, 0x240, 0x260}; in snd_gusextreme_es1688_create()
[all …]
H A Dgusclassic.c27 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
30 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */
34 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
35 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
36 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24};
37 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
69 static const long possible_ports[] = {0x220, 0x230, 0x240, 0x250, 0x260}; in snd_gusclassic_create()
77 if (irq[n] < 0) { in snd_gusclassic_create()
84 if (dma1[n] < 0) { in snd_gusclassic_create()
91 if (dma2[n] < 0) { in snd_gusclassic_create()
[all …]
/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-qserdes-txrx-ufs-v6.h9 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX 0x28
10 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX 0x2c
11 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX 0x30
12 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX 0x34
14 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2 0x08
15 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10
16 #define QSERDES_UFS_V6_RX_VGA_CAL_MAN_VAL 0x178
17 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B0 0x208
18 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B1 0x20c
19 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B3 0x214
[all …]
/openbmc/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_regs.h12 #define GEN12_KCR_BASE 0x32000
13 #define MTL_KCR_BASE 0x386000
16 #define KCR_INIT(base) _MMIO((base) + 0xf0)
21 /* KCR hwdrm session in play status 0-31 */
22 #define KCR_SIP(base) _MMIO((base) + 0x260)
25 #define KCR_GLOBAL_TERMINATE(base) _MMIO((base) + 0xf8)
/openbmc/u-boot/arch/arm/dts/
H A Dexynos4x12-pinctrl-uboot.dtsi13 reg = <0x180 0x20>;
16 reg = <0x240 0x20>;
24 reg = <0x40 0x20>;
27 reg = <0x260 0x20>;
30 reg = <0xc00 0x20>;
/openbmc/u-boot/drivers/spi/
H A Drenesas_rpc_spi.c19 #define RPC_CMNCR 0x0000 /* R/W */
22 #define RPC_CMNCR_MOIIO3(val) (((val) & 0x3) << 22)
23 #define RPC_CMNCR_MOIIO2(val) (((val) & 0x3) << 20)
24 #define RPC_CMNCR_MOIIO1(val) (((val) & 0x3) << 18)
25 #define RPC_CMNCR_MOIIO0(val) (((val) & 0x3) << 16)
28 #define RPC_CMNCR_IO3FV(val) (((val) & 0x3) << 14)
29 #define RPC_CMNCR_IO2FV(val) (((val) & 0x3) << 12)
30 #define RPC_CMNCR_IO0FV(val) (((val) & 0x3) << 8)
37 #define RPC_CMNCR_BSZ(val) (((val) & 0x3) << 0)
39 #define RPC_SSLDR 0x0004 /* R/W */
[all …]
/openbmc/qemu/include/hw/misc/
H A Daspeed_lpc.h18 #define ASPEED_LPC_NR_REGS (0x260 >> 2)
21 aspeed_lpc_kcs_1 = 0,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-apmixedsys.c15 #define REG_REF2USB 0x8
16 #define REG_AP_PLL_CON7 0x1c
17 #define MD1_MTCMOS_OFF BIT(0)
23 #define MT6795_CON0_EN BIT(0)
43 .pll_en_bit = 0, \
47 PLL(CLK_APMIXED_ARMCA53PLL, "armca53pll", 0x200, 0x20c, 0, PLL_AO,
48 21, 0x204, 24, 0x0, 0x204, 0),
49 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000101, HAVE_RST_BAR,
50 21, 0x220, 4, 0x0, 0x224, 0),
51 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR,
[all …]
H A Dclk-mt8173-apmixedsys.c17 #define REGOFF_REF2USB 0x8
18 #define REGOFF_HDMI_REF 0x40
52 { .div = 0, .freq = MT8173_PLL_FMAX },
61 PLL(CLK_APMIXED_ARMCA15PLL, "armca15pll", 0x200, 0x20c, 0, PLL_AO,
62 21, 0x204, 24, 0x0, 0x204, 0),
63 PLL(CLK_APMIXED_ARMCA7PLL, "armca7pll", 0x210, 0x21c, 0, PLL_AO,
64 21, 0x214, 24, 0x0, 0x214, 0),
65 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000100, HAVE_RST_BAR, 21,
66 0x220, 4, 0x0, 0x224, 0),
67 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7,
[all …]
/openbmc/linux/sound/isa/sb/
H A Dsb8.c21 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
24 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
60 return 0; in snd_sb8_match()
63 return 0; in snd_sb8_match()
67 return 0; in snd_sb8_match()
82 if (err < 0) in snd_sb8_probe()
87 * Block the 0x388 port to avoid PnP conflicts. in snd_sb8_probe()
91 acard->fm_res = devm_request_region(card->dev, 0x388, 4, in snd_sb8_probe()
98 if (err < 0) in snd_sb8_probe()
103 0x220, 0x240, 0x260, in snd_sb8_probe()
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dintel,x86-pinctrl.txt27 pin_usb_host_en0@0 {
28 gpio-offset = <0x80 8>;
29 pad-offset = <0x260>;
/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dhardware_am43xx.h16 #define L3F_CFG_BWLIMITER 0x44005200
19 #define UART0_BASE 0x44E09000
22 #define GPIO2_BASE 0x481AC000
25 #define WDT_BASE 0x44E35000
28 #define CTRL_BASE 0x44E10000
29 #define CTRL_DEVICE_BASE 0x44E10600
32 #define PRCM_BASE 0x44DF0000
33 #define CM_WKUP 0x44DF2800
34 #define CM_PER 0x44DF8800
35 #define CM_DPLL 0x44DF4200
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8250-mdss.yaml47 "^display-controller@[0-9a-f]+$":
53 "^dsi@[0-9a-f]+$":
61 "^phy@[0-9a-f]+$":
83 reg = <0x0ae00000 0x1000>;
102 iommus = <&apps_smmu 0x820 0x402>;
110 reg = <0x0ae01000 0x8f000>,
111 <0x0aeb0000 0x2008>;
127 interrupts = <0>;
131 #size-cells = <0>;
133 port@0 {
[all …]
H A Dqcom,sm8150-mdss.yaml48 "^display-controller@[0-9a-f]+$":
54 "^dsi@[0-9a-f]+$":
62 "^phy@[0-9a-f]+$":
81 reg = <0x0ae00000 0x1000>;
100 iommus = <&apps_smmu 0x800 0x420>;
108 reg = <0x0ae01000 0x8f000>,
109 <0x0aeb0000 0x2008>;
125 interrupts = <0>;
129 #size-cells = <0>;
131 port@0 {
[all …]
H A Ddsi-phy-7nm.yaml40 Connected to VDD_A_DSI_PLL_0P9 pin (or VDDA_DSI{0,1}_PLL_0P9 for sm8150)
61 reg = <0x0ae94400 0x200>,
62 <0x0ae94600 0x280>,
63 <0x0ae94900 0x260>;
69 #phy-cells = <0>;
H A Dqcom,sm8450-mdss.yaml39 "^display-controller@[0-9a-f]+$":
45 "^displayport-controller@[0-9a-f]+$":
53 "^dsi@[0-9a-f]+$":
61 "^phy@[0-9a-f]+$":
83 reg = <0x0ae00000 0x1000>;
86 interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>,
87 <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>;
104 iommus = <&apps_smmu 0x2800 0x402>;
112 reg = <0x0ae01000 0x8f000>,
113 <0x0aeb0000 0x2008>;
[all …]
/openbmc/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
32 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
36 #define S5P_OTHERS 0xE000
73 clk_base = of_iomap(np, 0); in s5pv210_retention_init()
93 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
94 EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04),
95 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
96 EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c),
97 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10),
98 EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
[all …]
/openbmc/linux/Documentation/sound/
H A Dalsa-configuration.rst57 (0 = disable debug prints, 1 = normal debug messages,
71 Default: 0
80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped
81 to PCM #0 of the card #0.
83 commas, such like ``dsp_map=0,1``.
98 Default: 0
119 Values: 0 through 31 or negative;
142 appearing card. They can do it by specifying "index=1,0" module
158 the port must be specified. For actual AdLib FM cards it will be 0x388.
170 64:0 OPL2 FM synth OPL2 FM Port
[all …]
/openbmc/linux/sound/isa/es1688/
H A Des1688.c31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
37 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
38 static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* Usually 0x388 */
39 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
42 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */
70 #define is_isapnp_selected(dev) 0
82 static const long possible_ports[] = {0x220, 0x240, 0x260}; in snd_es1688_legacy_create()
84 static const int possible_dmas[] = {1, 3, 0, -1}; in snd_es1688_legacy_create()
90 if (irq[n] < 0) { in snd_es1688_legacy_create()
97 if (dma8[n] < 0) { in snd_es1688_legacy_create()
[all …]
/openbmc/linux/Documentation/dev-tools/
H A Dkcsan.rst32 write to 0xffffffffc009a628 of 8 bytes by task 487 on cpu 0:
33 test_kernel_write+0x1d/0x30
34 access_thread+0x89/0xd0
35 kthread+0x23e/0x260
36 ret_from_fork+0x22/0x30
38 read to 0xffffffffc009a628 of 8 bytes by task 488 on cpu 6:
39 test_kernel_read+0x10/0x20
40 access_thread+0x89/0xd0
41 kthread+0x23e/0x260
42 ret_from_fork+0x22/0x30
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-pic32.h12 #define ANSEL_REG 0x00
13 #define TRIS_REG 0x10
14 #define PORT_REG 0x20
15 #define LAT_REG 0x30
16 #define ODCU_REG 0x40
17 #define CNPU_REG 0x50
18 #define CNPD_REG 0x60
19 #define CNCON_REG 0x70
20 #define CNEN_REG 0x80
21 #define CNSTAT_REG 0x90
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra124/
H A Dmc.h13 u32 reserved0[4]; /* offset 0x00 - 0x0C */
14 u32 mc_smmu_config; /* offset 0x10 */
15 u32 mc_smmu_tlb_config; /* offset 0x14 */
16 u32 mc_smmu_ptc_config; /* offset 0x18 */
17 u32 mc_smmu_ptb_asid; /* offset 0x1C */
18 u32 mc_smmu_ptb_data; /* offset 0x20 */
19 u32 reserved1[3]; /* offset 0x24 - 0x2C */
20 u32 mc_smmu_tlb_flush; /* offset 0x30 */
21 u32 mc_smmu_ptc_flush; /* offset 0x34 */
22 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra210/
H A Dmc.h13 u32 reserved0[4]; /* offset 0x00 - 0x0C */
14 u32 mc_smmu_config; /* offset 0x10 */
15 u32 mc_smmu_tlb_config; /* offset 0x14 */
16 u32 mc_smmu_ptc_config; /* offset 0x18 */
17 u32 mc_smmu_ptb_asid; /* offset 0x1C */
18 u32 mc_smmu_ptb_data; /* offset 0x20 */
19 u32 reserved1[3]; /* offset 0x24 - 0x2C */
20 u32 mc_smmu_tlb_flush; /* offset 0x30 */
21 u32 mc_smmu_ptc_flush; /* offset 0x34 */
22 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]

12345678910