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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dtoshiba,tmpv770x-pismu.yaml47 reg = <0 0x24200000 0 0x2140>;
/openbmc/linux/drivers/gpu/drm/radeon/reg_srcs/
H A Dr1001 r100 0x3294
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Dr2001 r200 0x3294
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Drv5151 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Dr3001 r300 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Drs6001 rs600 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Dr4201 r420 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/openbmc/linux/include/video/
H A Dtrident.h4 #define TRIDENTFB_DEBUG 0
20 #define CYBER9320 0x9320
21 #define CYBER9388 0x9388
22 #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
23 #define CYBER9385 0x9385 /* ditto */
24 #define CYBER9397 0x9397
25 #define CYBER9397DVD 0x939A
26 #define CYBER9520 0x9520
27 #define CYBER9525DVD 0x9525
28 #define TGUI9440 0x9440
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dam3517-evm-ui.dtsi142 reg = <0x1a>;
143 #sound-dai-cells= <0>;
149 reg = <0x1b>;
150 #sound-dai-cells= <0>;
159 reg = <0x1a>;
160 #sound-dai-cells= <0>;
167 reg = <0x20>;
175 reg = <0x21>;
184 reg = <0x5c>;
190 #sound-dai-cells = <0>;
[all …]
H A Dlogicpd-torpedo-som.dtsi15 cpu@0 {
22 reg = <0x80000000 0>;
36 #clock-cells = <0>;
43 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
45 nand@0,0 {
47 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
49 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
54 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
55 gpmc,sync-clk-ps = <0>;
56 gpmc,cs-on-ns = <0>;
[all …]
H A Domap3-igep.dtsi18 reg = <0x80000000 0x20000000>; /* 512 MB */
43 … OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
49 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
50 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
56 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
57 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
63 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
64 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
65 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
66 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
[all …]
H A Dlogicpd-som-lv.dtsi11 cpu@0 {
18 reg = <0x80000000 0>;
26 gpio = <&gpio1 3 0>; /* gpio_3 */
36 #phy-cells = <0>;
41 #clock-cells = <0>;
48 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
50 nand@0,0 {
52 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
54 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
59 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam3517-evm-ui.dtsi139 reg = <0x1a>;
140 #sound-dai-cells = <0>;
146 reg = <0x1b>;
147 #sound-dai-cells = <0>;
156 reg = <0x1a>;
157 #sound-dai-cells = <0>;
164 reg = <0x20>;
172 reg = <0x21>;
181 reg = <0x5c>;
187 #sound-dai-cells = <0>;
[all …]
H A Dlogicpd-torpedo-som.dtsi11 cpu@0 {
18 reg = <0x80000000 0>;
32 #clock-cells = <0>;
44 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
46 nand@0,0 {
48 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
50 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
55 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
56 gpmc,sync-clk-ps = <0>;
57 gpmc,cs-on-ns = <0>;
[all …]
H A Domap3-igep.dtsi15 reg = <0x80000000 0x20000000>; /* 512 MB */
40 … OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
46 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
47 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
53 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
54 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
60 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
61 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
62 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
63 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
[all …]
H A Domap3-cm-t3x.dtsi10 reg = <0x80000000 0x10000000>; /* 256 MB */
16 pinctrl-0 = <&green_led_pins>;
46 #phy-cells = <0>;
53 #phy-cells = <0>;
79 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
80 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
86 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
87 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
88 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
89 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
[all …]
H A Dlogicpd-som-lv.dtsi7 cpu@0 {
14 reg = <0x80000000 0>;
22 gpio = <&gpio1 3 0>; /* gpio_3 */
31 pinctrl-0 = <&hsusb2_reset_pin>;
34 #phy-cells = <0>;
39 #clock-cells = <0>;
46 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
48 nand@0,0 {
50 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
[all …]
H A Domap3-echo.dts17 cpu@0 {
24 reg = <0x80000000 0xc600000>; /* 198 MB */
64 pinctrl-0 = <&button_pins>;
128 reg = <0x2d>;
134 #sound-dai-cells = <0>;
136 pinctrl-0 = <&mcbsp2_pins>;
144 #size-cells = <0>;
147 reg = <0x32>;
148 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
151 multi-led@0 {
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23-pinfunc.h13 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
14 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
15 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
16 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
17 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
18 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
19 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
20 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
21 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
22 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/openbmc/linux/sound/soc/codecs/
H A Drt5514.h15 #define RT5514_DEVICE_ID 0x10ec5514
17 #define RT5514_RESET 0x2000
18 #define RT5514_PWR_ANA1 0x2004
19 #define RT5514_PWR_ANA2 0x2008
20 #define RT5514_I2S_CTRL1 0x2010
21 #define RT5514_I2S_CTRL2 0x2014
22 #define RT5514_VAD_CTRL6 0x2030
23 #define RT5514_EXT_VAD_CTRL 0x206c
24 #define RT5514_DIG_IO_CTRL 0x2070
25 #define RT5514_PAD_CTRL1 0x2080
[all …]
/openbmc/linux/arch/arm64/boot/dts/toshiba/
H A Dtmpv7708.dtsi14 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */
23 #size-cells = <0>;
57 cpu0: cpu@0 {
61 cpu-release-addr = <0x0 0x81100000>;
62 reg = <0x00>;
69 cpu-release-addr = <0x0 0x81100000>;
70 reg = <0x01>;
77 cpu-release-addr = <0x0 0x81100000>;
78 reg = <0x02>;
85 cpu-release-addr = <0x0 0x81100000>;
[all …]
/openbmc/linux/include/uapi/linux/
H A Dzorro_ids.h9 #define ZORRO_MANUF_PACIFIC_PERIPHERALS 0x00D3
10 #define ZORRO_PROD_PACIFIC_PERIPHERALS_SE_2000_A500 ZORRO_ID(PACIFIC_PERIPHERALS, 0x00, 0)
11 #define ZORRO_PROD_PACIFIC_PERIPHERALS_SCSI ZORRO_ID(PACIFIC_PERIPHERALS, 0x0A, 0)
13 #define ZORRO_MANUF_MACROSYSTEMS_USA_2 0x0100
14 #define ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE ZORRO_ID(MACROSYSTEMS_USA_2, 0x13, 0)
16 #define ZORRO_MANUF_KUPKE_1 0x00DD
17 #define ZORRO_PROD_KUPKE_GOLEM_RAM_BOX_2MB ZORRO_ID(KUPKE_1, 0x00, 0)
19 #define ZORRO_MANUF_MEMPHIS 0x0100
20 #define ZORRO_PROD_MEMPHIS_STORMBRINGER ZORRO_ID(MEMPHIS, 0x00, 0)
22 #define ZORRO_MANUF_3_STATE 0x0200
[all …]
/openbmc/linux/drivers/parport/
H A Dparport_serial.c25 titan_110l = 0,
102 dev->subsystem_device == 0x0299) in netmos_parallel_init()
110 * and serial ports. The form is 0x00PS, where <P> is the number of in netmos_parallel_init()
113 par->numports = (dev->subsystem_device & 0xf0) >> 4; in netmos_parallel_init()
118 return 0; in netmos_parallel_init()
125 /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
126 /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
128 /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
129 /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
174 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Dmac.h11 #define MAC_MEM_DUMP_PAGE_SIZE 0x40000
12 #define ADDR_CAM_ENT_SIZE 0x40
13 #define BSSID_CAM_ENT_SIZE 0x08
18 RTW89_DMAC_SEL = 0,
25 RTW89_FWD_DONT_CARE = 0,
41 RTW89_MAC_WD_DMA_INTVL_DEF = 0xFE
53 RTW89_MAC_TAG_NUM_DEF = 0xFE
57 RTW89_MAC_LBC_TMR_8US = 0,
68 RTW89_MAC_LBC_TMR_DEF = 0xFE
72 CPUIO_OP_CMD_GET_1ST_PID = 0,
[all …]

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