Home
last modified time | relevance | path

Searched +full:0 +full:x20200000 (Results 1 – 25 of 41) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsprd,ums512-clk.yaml66 reg = <0x20200000 0x1000>;
H A Drockchip,rv1108-cru.yaml71 reg = <0x20200000 0x1000>;
/openbmc/linux/drivers/remoteproc/
H A Dimx_rproc.c28 #define IMX7D_SRC_SCR 0x0C
32 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
46 #define IMX8M_GPR22 0x58
47 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0)
49 /* Address: 0x020D8000 */
50 #define IMX6SX_SRC_SCR 0x00
66 #define IMX_SIP_RPROC 0xC2000005
67 #define IMX_SIP_RPROC_START 0x00
68 #define IMX_SIP_RPROC_STARTED 0x01
69 #define IMX_SIP_RPROC_STOP 0x02
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_phy_ast2600.h1 #define DDR_PHY_TBL_CHG_ADDR 0xaeeddeea
2 #define DDR_PHY_TBL_END 0xaeededed
17 #define PHY_RON ((0x7 << 16) | (0x7 << 12))
31 #define PHY_ODT (0x6 << 8)
33 #define PHY_ODT (0x5 << 8)
35 #define PHY_ODT (0x4 << 8)
37 #define PHY_ODT (0x3 << 8)
46 #define DRAM_RON (0x1 << 1)
48 #define DRAM_RON (0x0 << 1)
83 #define RTT_WR (0x0 << 9)
[all …]
/openbmc/linux/arch/parisc/kernel/
H A Dmodule.c57 (( ( !((val) & (1<<((bits)-1))) && ((val)>>(bits)) != 0 ) || \
58 ( ((val) & (1<<((bits)-1))) && ((val)>>(bits)) != (((__typeof__(val))(~0))>>((bits)+2)))) ? \
59 0 : 1)
63 printk(KERN_ERR "module %s relocation of symbol %s is out of range (0x%lx in %d bits)\n", \
70 * 0x3fff; however, since we're only going forward, this becomes
71 * 0x1fff, and thus, since each GOT entry is 8 bytes long we can have
75 * which gives us a maximum positive displacement of 0x7fff, and as such
98 #define rnd(x) (((x)+0x1000)&~0x1fff)
104 #define rsel(v,a) (((v)+(a))&0x7ff)
108 #define rrsel(v,a) ((((v)+rnd(a))&0x7ff)+((a)-rnd(a)))
[all …]
/openbmc/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/openbmc/linux/drivers/net/mdio/
H A Dmdio-mux-meson-g12a.c18 #define ETH_PLL_STS 0x40
19 #define ETH_PLL_CTL0 0x44
25 #define PLL_CTL0_M GENMASK(8, 0)
28 #define ETH_PLL_CTL1 0x48
29 #define ETH_PLL_CTL2 0x4c
30 #define ETH_PLL_CTL3 0x50
31 #define ETH_PLL_CTL4 0x54
32 #define ETH_PLL_CTL5 0x58
33 #define ETH_PLL_CTL6 0x5c
34 #define ETH_PLL_CTL7 0x60
[all …]
/openbmc/linux/arch/s390/kernel/
H A Duprobes.c42 return 0; in arch_uprobe_pre_xol()
58 return 0; in check_per_event()
60 if (control == 0) in check_per_event()
63 if ((control & 0x20200000) && (cause & 0x2000)) in check_per_event()
65 if (cause & 0x8000) { in check_per_event()
67 if ((control & 0x80800000) == 0x80000000) in check_per_event()
70 if (((control & 0x80800000) == 0x80800000) && in check_per_event()
75 return 0; in check_per_event()
91 int reg = (auprobe->insn[0] & 0xf0) >> 4; in arch_uprobe_post_xol()
96 int ilen = insn_length(auprobe->insn[0] >> 8); in arch_uprobe_post_xol()
[all …]
/openbmc/linux/drivers/staging/rtl8192u/
H A Dr819xU_firmware_img.c7 0x0, };
10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
[all …]
/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dtable.c10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
19 0x824, 0x00690000,
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
H A Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10005388,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dtable.c8 0x800, 0x80040000,
9 0x804, 0x00000003,
10 0x808, 0x0000FC00,
11 0x80C, 0x0000000A,
12 0x810, 0x10001331,
13 0x814, 0x020C3D10,
14 0x818, 0x02200385,
15 0x81C, 0x00000000,
16 0x820, 0x01000100,
17 0x824, 0x00190204,
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drv1108.dtsi28 #size-cells = <0>;
33 reg = <0xf00>;
53 #clock-cells = <0>;
64 reg = <0x102a0000 0x4000>;
65 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
75 reg = <0x10080000 0x2000>;
78 ranges = <0 0x10080000 0x2000>;
83 reg = <0x10210000 0x100>;
91 pinctrl-0 = <&uart2m0_xfer>;
97 reg = <0x10220000 0x100>;
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dtable.c7 0x800, 0x80040000,
8 0x804, 0x00000003,
9 0x808, 0x0000fc00,
10 0x80c, 0x0000000a,
11 0x810, 0x10005388,
12 0x814, 0x020c3d10,
13 0x818, 0x02200385,
14 0x81c, 0x00000000,
15 0x820, 0x01000100,
16 0x824, 0x00390004,
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_BB.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
40 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive()
42 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive()
48 cond1 &= 0x000F0FFF; in CheckPositive()
49 driver1 &= 0x000F0FFF; in CheckPositive()
52 u32 bitMask = 0; in CheckPositive()
54 if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */ in CheckPositive()
57 if ((cond1 & BIT0) != 0) /* GLNA */ in CheckPositive()
58 bitMask |= 0x000000FF; in CheckPositive()
[all …]
/openbmc/linux/arch/m68k/fpsp040/
H A Dstan.S27 | k = N mod 2, so in particular, k = 0 or 1.
62 BOUNDS1: .long 0x3FD78000,0x4004BC7E
63 TWOBYPI: .long 0x3FE45F30,0x6DC9C883
65 TANQ4: .long 0x3EA0B759,0xF50F8688
66 TANP3: .long 0xBEF2BAA5,0xA8924F04
68 TANQ3: .long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000
70 TANP2: .long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000
72 TANQ2: .long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000
74 TANP1: .long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000
76 TANQ1: .long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000
[all …]
/openbmc/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/openbmc/qemu/target/m68k/
H A Dsoftfloat_fpsp_tables.h26 make_floatx80_init(0x3FFE, 0xFE03F80FE03F80FE),
27 make_floatx80_init(0x3FF7, 0xFF015358833C47E2),
28 make_floatx80_init(0x3FFE, 0xFA232CF252138AC0),
29 make_floatx80_init(0x3FF9, 0xBDC8D83EAD88D549),
30 make_floatx80_init(0x3FFE, 0xF6603D980F6603DA),
31 make_floatx80_init(0x3FFA, 0x9CF43DCFF5EAFD48),
32 make_floatx80_init(0x3FFE, 0xF2B9D6480F2B9D65),
33 make_floatx80_init(0x3FFA, 0xDA16EB88CB8DF614),
34 make_floatx80_init(0x3FFE, 0xEF2EB71FC4345238),
35 make_floatx80_init(0x3FFB, 0x8B29B7751BD70743),
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
34 #size-cells = <0>;
36 CPU0: cpu@0 {
39 reg = <0x0>;
52 reg = <0x1>;
64 reg = <0x2>;
76 reg = <0x3>;
94 qcom,dload-mode = <&tcsr 0x6100>;
156 mboxes = <&apcs_glb 0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dums512.dtsi18 #size-cells = <0>;
49 CPU0: cpu@0 {
52 reg = <0x0 0x0>;
60 reg = <0x0 0x100>;
68 reg = <0x0 0x200>;
76 reg = <0x0 0x300>;
84 reg = <0x0 0x400>;
92 reg = <0x0 0x500>;
100 reg = <0x0 0x600>;
108 reg = <0x0 0x700>;
[all …]
/openbmc/qemu/hw/riscv/
H A Dmicrochip_pfsoc.c11 * 0) CLINT (Core Level Interruptor)
62 #define RESET_VECTOR 0x20220000
68 #define GEM_REVISION 0x0107010c
89 [MICROCHIP_PFSOC_RSVD0] = { 0x0, 0x100 },
90 [MICROCHIP_PFSOC_DEBUG] = { 0x100, 0xf00 },
91 [MICROCHIP_PFSOC_E51_DTIM] = { 0x1000000, 0x2000 },
92 [MICROCHIP_PFSOC_BUSERR_UNIT0] = { 0x1700000, 0x1000 },
93 [MICROCHIP_PFSOC_BUSERR_UNIT1] = { 0x1701000, 0x1000 },
94 [MICROCHIP_PFSOC_BUSERR_UNIT2] = { 0x1702000, 0x1000 },
95 [MICROCHIP_PFSOC_BUSERR_UNIT3] = { 0x1703000, 0x1000 },
[all …]

12