Searched +full:0 +full:x1e620000 (Results 1 – 14 of 14) sorted by relevance
/openbmc/qemu/tests/qtest/ |
H A D | aspeed_smc-test.c | 38 g_assert(fd >= 0); in test_palmetto_bmc() 40 g_assert(ret == 0); in test_palmetto_bmc() 48 data->flash_base = 0x20000000; in test_palmetto_bmc() 49 data->spi_base = 0x1E620000; in test_palmetto_bmc() 50 data->jedec_id = 0x20ba19; in test_palmetto_bmc() 51 data->cs = 0; in test_palmetto_bmc() 52 data->node = "/machine/soc/fmc/ssi.0/child[0]"; in test_palmetto_bmc() 54 data->page_addr = 0x14000 * FLASH_PAGE_SIZE; in test_palmetto_bmc() 85 g_assert(fd >= 0); in test_ast2500_evb() 87 g_assert(ret == 0); in test_ast2500_evb() [all …]
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/ |
H A D | utils.S | 11 #define AST_FMC_BASE (0x1E620000) 12 #define AST_FMC_INT_CTRL_STAT (AST_FMC_BASE + 0x008) 13 #define AST_FMC_DMA_CTRL (AST_FMC_BASE + 0x080) 14 #define AST_FMC_DMA_FLASH_ADDR (AST_FMC_BASE + 0x084) 15 #define AST_FMC_DMA_DRAM_ADDR (AST_FMC_BASE + 0x088) 16 #define AST_FMC_DMA_LENGTH (AST_FMC_BASE + 0x08C) 49 mov r1, #0
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/ |
H A D | utils.S | 11 #define AST_FMC_BASE (0x1E620000) 12 #define AST_FMC_INT_CTRL_STAT (AST_FMC_BASE + 0x008) 13 #define AST_FMC_DMA_CTRL (AST_FMC_BASE + 0x080) 14 #define AST_FMC_DMA_FLASH_ADDR (AST_FMC_BASE + 0x084) 15 #define AST_FMC_DMA_DRAM_ADDR (AST_FMC_BASE + 0x088) 16 #define AST_FMC_DMA_LENGTH (AST_FMC_BASE + 0x08C) 49 mov r1, #0
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
H A D | utils.S | 11 #define AST_SCU_BASE (0x1E6E2000) 12 #define AST_SCU_HW_STRAP1 (AST_SCU_BASE + 0x500) 13 #define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510) 15 #define AST_FMC_BASE (0x1E620000) 16 #define AST_FMC_INT_CTRL_STAT (AST_FMC_BASE + 0x008) 17 #define AST_FMC_DMA_CTRL (AST_FMC_BASE + 0x080) 18 #define AST_FMC_DMA_FLASH_ADDR (AST_FMC_BASE + 0x084) 19 #define AST_FMC_DMA_DRAM_ADDR (AST_FMC_BASE + 0x088) 20 #define AST_FMC_DMA_LENGTH (AST_FMC_BASE + 0x08C) 30 tst r0, #0x100 [all …]
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H A D | platform.S | 15 * +----------------------+ 0x40 17 * +----------------------+ 0x3c 22 * +----------------------+ 0x10 24 * +----------------------+ 0x0c 26 * +----------------------+ 0x08 28 * +----------------------+ 0x04 33 #define SCU_BASE 0x1e6e2000 35 #define SCU_PROT_KEY2 (SCU_BASE + 0x010) 36 #define SCU_REV_ID (SCU_BASE + 0x014) 37 #define SCU_SYSRST_CTRL (SCU_BASE + 0x040) [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | aspeed,ast2600-fmc.yaml | 55 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 57 #size-cells = <0>; 62 flash@0 { 63 reg = < 0 >;
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/openbmc/qemu/hw/arm/ |
H A D | aspeed_ast2400.c | 26 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 29 [ASPEED_DEV_SPI_BOOT] = 0x00000000, 30 [ASPEED_DEV_IOMEM] = 0x1E600000, 31 [ASPEED_DEV_FMC] = 0x1E620000, 32 [ASPEED_DEV_SPI1] = 0x1E630000, 33 [ASPEED_DEV_EHCI1] = 0x1E6A1000, 34 [ASPEED_DEV_UHCI] = 0x1E6B0000, 35 [ASPEED_DEV_VIC] = 0x1E6C0000, 36 [ASPEED_DEV_SDMC] = 0x1E6E0000, 37 [ASPEED_DEV_SCU] = 0x1E6E2000, [all …]
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H A D | aspeed_ast2600.c | 21 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 22 #define ASPEED_SOC_DPMCU_SIZE 0x00040000 25 [ASPEED_DEV_SPI_BOOT] = 0x00000000, 26 [ASPEED_DEV_SRAM] = 0x10000000, 27 [ASPEED_DEV_DPMCU] = 0x18000000, 28 /* 0x16000000 0x17FFFFFF : AHB BUS do LPC Bus bridge */ 29 [ASPEED_DEV_IOMEM] = 0x1E600000, 30 [ASPEED_DEV_PWM] = 0x1E610000, 31 [ASPEED_DEV_FMC] = 0x1E620000, 32 [ASPEED_DEV_SPI1] = 0x1E630000, [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | ast2400.dtsi | 39 #size-cells = <0>; 41 cpu@0 { 44 reg = <0>; 50 reg = <0x40000000 0>; 60 reg = < 0x1e620000 0xc4 61 0x20000000 0x10000000 >; 63 #size-cells = <0>; 69 flash@0 { 70 reg = < 0 >; 87 reg = < 0x1e630000 0xc4 [all …]
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H A D | ast2500.dtsi | 39 #size-cells = <0>; 41 cpu@0 { 44 reg = <0>; 50 reg = <0x80000000 0>; 60 reg = < 0x1e620000 0xc4 61 0x20000000 0x10000000 >; 63 #size-cells = <0>; 69 flash@0 { 70 reg = < 0 >; 87 reg = < 0x1e630000 0xc4 [all …]
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H A D | ast2600.dtsi | 47 #size-cells = <0>; 50 cpu@0 { 53 reg = <0>; 79 size = <0x01000000>; 80 alignment = <0x01000000>; 86 size = <0x04000000>; 87 alignment = <0x01000000>; 106 reg = <0x40461000 0x1000>, 107 <0x40462000 0x1000>, 108 <0x40464000 0x2000>, [all …]
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/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-g4.dtsi | 36 #size-cells = <0>; 38 cpu@0 { 41 reg = <0>; 47 reg = <0x40000000 0>; 57 reg = <0x1e620000 0x94>, <0x20000000 0x10000000>; 59 #size-cells = <0>; 64 flash@0 { 65 reg = < 0 >; 102 reg = <0x1e630000 0x18>, <0x30000000 0x10000000>; 104 #size-cells = <0>; [all …]
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H A D | aspeed-g6.dtsi | 48 #size-cells = <0>; 54 reg = <0xf00>; 60 reg = <0xf01>; 78 reg = <0x1e6e0000 0x174>; 79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 95 reg = <0x40461000 0x1000>, 96 <0x40462000 0x1000>, 97 <0x40464000 0x2000>, 98 <0x40466000 0x2000>; 103 reg = <0x1e600000 0x100>; [all …]
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H A D | aspeed-g5.dtsi | 37 #size-cells = <0>; 39 cpu@0 { 42 reg = <0>; 48 reg = <0x80000000 0>; 58 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 60 #size-cells = <0>; 65 flash@0 { 66 reg = < 0 >; 89 reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>; 91 #size-cells = <0>; [all …]
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