16ee05ebfSChia-Wei, Wang// SPDX-License-Identifier: GPL-2.0 26ee05ebfSChia-Wei, Wang/* 36ee05ebfSChia-Wei, Wang * Copyright (C) ASPEED Technology Inc. 46ee05ebfSChia-Wei, Wang * Chia-Wei Wang <chiawei_wang@aspeedtech.com> 56ee05ebfSChia-Wei, Wang */ 66ee05ebfSChia-Wei, Wang 76ee05ebfSChia-Wei, Wang#include <config.h> 86ee05ebfSChia-Wei, Wang#include <asm/armv7.h> 96ee05ebfSChia-Wei, Wang#include <linux/linkage.h> 106ee05ebfSChia-Wei, Wang 113bed5fe9SChia-Wei, Wang#define AST_SCU_BASE (0x1E6E2000) 123bed5fe9SChia-Wei, Wang#define AST_SCU_HW_STRAP1 (AST_SCU_BASE + 0x500) 13*2c659fbcSChia-Wei, Wang#define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510) 143bed5fe9SChia-Wei, Wang 156ee05ebfSChia-Wei, Wang#define AST_FMC_BASE (0x1E620000) 166ee05ebfSChia-Wei, Wang#define AST_FMC_INT_CTRL_STAT (AST_FMC_BASE + 0x008) 176ee05ebfSChia-Wei, Wang#define AST_FMC_DMA_CTRL (AST_FMC_BASE + 0x080) 186ee05ebfSChia-Wei, Wang#define AST_FMC_DMA_FLASH_ADDR (AST_FMC_BASE + 0x084) 196ee05ebfSChia-Wei, Wang#define AST_FMC_DMA_DRAM_ADDR (AST_FMC_BASE + 0x088) 206ee05ebfSChia-Wei, Wang#define AST_FMC_DMA_LENGTH (AST_FMC_BASE + 0x08C) 216ee05ebfSChia-Wei, Wang 226ee05ebfSChia-Wei, Wang/* 233bed5fe9SChia-Wei, Wang * void aspeed_bootmode(void) 243bed5fe9SChia-Wei, Wang * 253bed5fe9SChia-Wei, Wang * return the boot mode according to the HW strap information 263bed5fe9SChia-Wei, Wang */ 273bed5fe9SChia-Wei, WangENTRY(aspeed_bootmode) 28*2c659fbcSChia-Wei, Wang ldr r1, =AST_SCU_HW_STRAP2 29*2c659fbcSChia-Wei, Wang ldr r0, [r1] 30*2c659fbcSChia-Wei, Wang tst r0, #0x100 31*2c659fbcSChia-Wei, Wang movne r0, #0x2 @; AST_BOOTMODE_UART 32*2c659fbcSChia-Wei, Wang bne 0f 33*2c659fbcSChia-Wei, Wang 343bed5fe9SChia-Wei, Wang ldr r1, =AST_SCU_HW_STRAP1 353bed5fe9SChia-Wei, Wang ldr r0, [r1] 363bed5fe9SChia-Wei, Wang tst r0, #0x4 373bed5fe9SChia-Wei, Wang moveq r0, #0x0 @; AST_BOOTMODE_SPI 383bed5fe9SChia-Wei, Wang movne r0, #0x1 @; AST_BOOTMODE_EMMC 39*2c659fbcSChia-Wei, Wang0: 403bed5fe9SChia-Wei, Wang mov pc, lr 413bed5fe9SChia-Wei, WangENDPROC(aspeed_bootmode) 423bed5fe9SChia-Wei, Wang 433bed5fe9SChia-Wei, Wang/* 446ee05ebfSChia-Wei, Wang * void aspeed_spi_fastcpy(u32 mem_addr, u32 spi_addr, u32 count) 456ee05ebfSChia-Wei, Wang * 466ee05ebfSChia-Wei, Wang * perform FMC SPI DMA to speed up flash copy. 476ee05ebfSChia-Wei, Wang * @dst: destination memory address 486ee05ebfSChia-Wei, Wang * @src: source SPI address 496ee05ebfSChia-Wei, Wang * @count: number of bytes to be copied, 4-byte aligned 506ee05ebfSChia-Wei, Wang * 516ee05ebfSChia-Wei, Wang * NOTE that the caller must ensure the validity of parameters. 526ee05ebfSChia-Wei, Wang */ 536ee05ebfSChia-Wei, WangENTRY(aspeed_spi_fastcpy) 546ee05ebfSChia-Wei, Wang ldr r3, =AST_FMC_DMA_DRAM_ADDR 556ee05ebfSChia-Wei, Wang str r0, [r3] 566ee05ebfSChia-Wei, Wang 576ee05ebfSChia-Wei, Wang ldr r3, =AST_FMC_DMA_FLASH_ADDR 586ee05ebfSChia-Wei, Wang str r1, [r3] 596ee05ebfSChia-Wei, Wang 606ee05ebfSChia-Wei, Wang ldr r3, =AST_FMC_DMA_LENGTH 616ee05ebfSChia-Wei, Wang str r2, [r3] 626ee05ebfSChia-Wei, Wang 636ee05ebfSChia-Wei, Wang ldr r0, =AST_FMC_DMA_CTRL 646ee05ebfSChia-Wei, Wang mov r1, #1 656ee05ebfSChia-Wei, Wang str r1, [r0] 666ee05ebfSChia-Wei, Wang 676ee05ebfSChia-Wei, Wang ldr r0, =AST_FMC_INT_CTRL_STAT 686ee05ebfSChia-Wei, Wangpolling: 696ee05ebfSChia-Wei, Wang ldr r1, [r0] 706ee05ebfSChia-Wei, Wang tst r1, #(1 << 11) 716ee05ebfSChia-Wei, Wang beq polling 726ee05ebfSChia-Wei, Wang 736ee05ebfSChia-Wei, Wang ldr r0, =AST_FMC_DMA_CTRL 746ee05ebfSChia-Wei, Wang mov r1, #0 756ee05ebfSChia-Wei, Wang str r1, [r0] 766ee05ebfSChia-Wei, Wang 776ee05ebfSChia-Wei, Wang mov pc, lr 786ee05ebfSChia-Wei, WangENDPROC(aspeed_spi_fastcpy) 79