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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mdp3-rsz.yaml63 reg = <0x14003000 0x1000>;
64 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
72 reg = <0x14004000 0x1000>;
73 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
H A Dmediatek-mdp.txt35 reg = <0 0x14001000 0 0x1000>;
45 reg = <0 0x14002000 0 0x1000>;
54 reg = <0 0x14003000 0 0x1000>;
61 reg = <0 0x14004000 0 0x1000>;
68 reg = <0 0x14005000 0 0x1000>;
75 reg = <0 0x14006000 0 0x1000>;
83 reg = <0 0x14007000 0 0x1000>;
91 reg = <0 0x14008000 0 0x1000>;
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dgen9_renderstate.c11 0x000007a8,
12 0x000007b4,
13 0x000007bc,
14 0x000007cc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
H A Dgen8_renderstate.c11 0x00000798,
12 0x000007a4,
13 0x000007ac,
14 0x000007bc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
/openbmc/linux/arch/mips/include/asm/mach-au1x00/
H A Dau1000.h105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300
108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */
109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */
110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */
111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */
112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */
113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */
114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */
115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */
116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi53 cluster0_opp: opp-table-0 {
129 #size-cells = <0>;
151 cpu0: cpu@0 {
154 reg = <0x000>;
169 reg = <0x001>;
184 reg = <0x100>;
199 reg = <0x101>;
214 CPU_SLEEP_0: cpu-sleep-0 {
220 arm,psci-suspend-param = <0x0010000>;
242 cpu_suspend = <0x84000001>;
[all …]
H A Dmt8192.dtsi34 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #clock-cells = <0>;
57 #size-cells = <0>;
59 cpu0: cpu@0 {
62 reg = <0x000>;
73 performance-domains = <&performance 0>;
80 reg = <0x100>;
91 performance-domains = <&performance 0>;
98 reg = <0x200>;
[all …]
H A Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]