Searched +full:0 +full:x12140000 (Results 1 – 6 of 6) sorted by relevance
79 "^pmu@[0-9a-f]+$":93 "^i2c-isp@[0-9a-f]+$":115 pinctrl-0: true146 reg = <0x12000000 0x260000>;188 reg = <0x10020000 0x3000>;193 reg = <0x12140000 0x100>;196 pinctrl-0 = <&fimc_is_i2c1>;199 #size-cells = <0>;203 reg = <0x10>;
34 The clock specifier cell stores an index of a clock: 0, 1 for78 "^csis@[0-9a-f]+$":83 "^fimc@[0-9a-f]+$":88 "^fimc-is@[0-9a-f]+$":93 "^fimc-lite@[0-9a-f]+$":121 ranges = <0x0 0x0 0x18000000>;133 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;138 reg = <0x11800000 0x1000>;157 reg = <0x11880000 0x4000>;165 assigned-clock-rates = <0>, <176000000>;[all …]
10 #define DEVICE_NOT_AVAILABLE 013 #define EXYNOS4_ADDR_BASE 0x1000000016 #define EXYNOS4_I2C_SPACING 0x1000018 #define EXYNOS4_GPIO_PART3_BASE 0x0386000019 #define EXYNOS4_PRO_ID 0x1000000020 #define EXYNOS4_SYSREG_BASE 0x1001000021 #define EXYNOS4_POWER_BASE 0x1002000022 #define EXYNOS4_SWRESET 0x1002040023 #define EXYNOS4_CLOCK_BASE 0x1003000024 #define EXYNOS4_SYSTIMER_BASE 0x10050000[all …]
35 #size-cells = <0>;63 cpu0: cpu@0 {66 reg = <0x0>;73 reg = <0x1>;80 reg = <0x100>;87 reg = <0x101>;94 reg = <0x102>;101 reg = <0x103>;114 reg = <0x10010000 0x10000>;128 reg = <0x10200000 0x10000>;[all …]
27 #size-cells = <0>;29 cpu0: cpu@0 {31 reg = <0>;45 #clock-cells = <0>;66 reg = <0x02040000 0x1000>;67 arm,data-latency = <2 2 0>;76 reg = <0x02000000 0x1000>,77 <0x02002000 0x1000>;86 reg = <0x0200a000 0x100>;88 cpu-offset = <0x80000>;[all …]
18 #size-cells = <0>;20 cpu@0 {24 reg = <0>;45 reg = <0x0 0x0>;50 interrupts = <1 9 0x304>;56 #clock-cells = <0>;63 #clock-cells = <0>;70 #clock-cells = <0>;83 io-channels = <&pm8058_xoadc 0x00 0x01>, /* Battery */84 <&pm8058_xoadc 0x00 0x02>, /* DC in (charger) */[all …]