Searched +full:0 +full:x11230000 (Results 1 – 15 of 15) sorted by relevance
/openbmc/linux/drivers/gpu/drm/i915/gt/ |
H A D | gen7_renderstate.c | 11 0x0000000c, 12 0x00000010, 13 0x00000018, 14 0x000001ec, 19 0x69040000, 20 0x61010008, 21 0x00000000, 22 0x00000001, /* reloc */ 23 0x00000001, /* reloc */ 24 0x00000000, [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | mediatek-pcie-gen3.yaml | 27 |0|1|2|3|4|5|6|7| (PCIe intc) 34 |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets) 75 const: 0 119 const: 0 206 reg = <0x00 0x11230000 0x00 0x4000>; 208 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>; 209 bus-range = <0x00 0xff>; 210 ranges = <0x82000000 0x00 0x12000000 0x00 211 0x12000000 0x00 0x1000000>; 231 interrupt-map-mask = <0 0 0 0x7>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | mt7623.dtsi | 24 #size-cells = <0>; 27 cpu0: cpu@0 { 30 reg = <0x0>; 40 reg = <0x1>; 50 reg = <0x2>; 60 reg = <0x3>; 71 #clock-cells = <0>; 76 #clock-cells = <0>; 81 clk26m: oscillator-0 { 83 #clock-cells = <0>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | mtk-sd.yaml | 79 pinctrl-0: 98 minimum: 0 99 maximum: 0xffffffff 106 The value is an integer from 0 to 31. 107 minimum: 0 115 The value is an integer from 0 to 31. 116 minimum: 0 130 pad macro, there are 32 stages from 0 to 31. 135 minimum: 0 142 data crc error caused by stop clock(fifo full) Valid range = [0:0x7]. [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt7986a.dtsi | 21 #size-cells = <0>; 22 cpu0: cpu@0 { 24 reg = <0x0>; 32 reg = <0x1>; 40 reg = <0x2>; 48 reg = <0x3>; 58 #clock-cells = <0>; 73 reg = <0 0x43000000 0 0x30000>; 79 reg = <0 0x4fc00000 0 0x00100000>; 83 reg = <0 0x4fd00000 0 0x40000>; [all …]
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H A D | mt8365.dtsi | 21 #size-cells = <0>; 23 cluster0_opp: opp-table-0 { 125 cpu0: cpu@0 { 128 reg = <0x0>; 132 i-cache-size = <0x8000>; 135 d-cache-size = <0x8000>; 148 reg = <0x1>; 152 i-cache-size = <0x8000>; 155 d-cache-size = <0x8000>; 168 reg = <0x2>; [all …]
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H A D | mt6795.dtsi | 29 #size-cells = <0>; 31 cpu0: cpu@0 { 35 reg = <0x000>; 44 reg = <0x001>; 59 reg = <0x002>; 74 reg = <0x003>; 89 reg = <0x100>; 104 reg = <0x101>; 119 reg = <0x102>; 134 reg = <0x103>; [all …]
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H A D | mt7622.dtsi | 69 #size-cells = <0>; 71 cpu0: cpu@0 { 74 reg = <0x0 0x0>; 89 reg = <0x0 0x1>; 111 #clock-cells = <0>; 116 #clock-cells = <0>; 140 reg = <0 0x43000000 0 0x30000>; 150 thermal-sensors = <&thermal 0>; 216 reg = <0 0x10000000 0 0x1000>; 223 reg = <0 0x10001000 0 0x250>; [all …]
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H A D | mt2712e.dtsi | 22 cluster0_opp: opp-table-0 { 66 #size-cells = <0>; 85 cpu0: cpu@0 { 88 reg = <0x000>; 100 reg = <0x001>; 113 reg = <0x200>; 126 CPU_SLEEP_0: cpu-sleep-0 { 132 arm,psci-suspend-param = <0x0010000>; 135 CLUSTER_SLEEP_0: cluster-sleep-0 { 141 arm,psci-suspend-param = <0x1010000>; [all …]
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H A D | mt8173.dtsi | 53 cluster0_opp: opp-table-0 { 129 #size-cells = <0>; 151 cpu0: cpu@0 { 154 reg = <0x000>; 169 reg = <0x001>; 184 reg = <0x100>; 199 reg = <0x101>; 214 CPU_SLEEP_0: cpu-sleep-0 { 220 arm,psci-suspend-param = <0x0010000>; 242 cpu_suspend = <0x84000001>; [all …]
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H A D | mt8192.dtsi | 34 #clock-cells = <0>; 43 #clock-cells = <0>; 50 #clock-cells = <0>; 57 #size-cells = <0>; 59 cpu0: cpu@0 { 62 reg = <0x000>; 73 performance-domains = <&performance 0>; 80 reg = <0x100>; 91 performance-domains = <&performance 0>; 98 reg = <0x200>; [all …]
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H A D | mt8186.dtsi | 327 #size-cells = <0>; 365 cpu0: cpu@0 { 368 reg = <0x000>; 392 reg = <0x100>; 416 reg = <0x200>; 440 reg = <0x300>; 464 reg = <0x400>; 488 reg = <0x500>; 512 reg = <0x600>; 536 reg = <0x700>; [all …]
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H A D | mt8183.dtsi | 293 #size-cells = <0>; 327 cpu0: cpu@0 { 330 reg = <0x000>; 353 reg = <0x001>; 376 reg = <0x002>; 399 reg = <0x003>; 422 reg = <0x100>; 445 reg = <0x101>; 468 reg = <0x102>; 491 reg = <0x103>; [all …]
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H A D | mt8195.dtsi | 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x000>; 58 performance-domains = <&performance 0>; 75 reg = <0x100>; 77 performance-domains = <&performance 0>; 94 reg = <0x200>; 96 performance-domains = <&performance 0>; 113 reg = <0x300>; 115 performance-domains = <&performance 0>; [all …]
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt7623.dtsi | 73 #size-cells = <0>; 76 cpu0: cpu@0 { 79 reg = <0x0>; 91 reg = <0x1>; 103 reg = <0x2>; 115 reg = <0x3>; 137 #clock-cells = <0>; 142 #clock-cells = <0>; 147 clk26m: oscillator-0 { 149 #clock-cells = <0>; [all …]
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