Searched +full:0 +full:x110a0000 (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r9a07g043u.dtsi | 17 #size-cells = <0>; 19 cpu0: cpu@0 { 21 reg = <0>; 30 L3_CA55: cache-controller-0 { 33 cache-size = <0x40000>; 70 reg = <0 0x110a0000 0 0x10000>; 72 #address-cells = <0>; 74 interrupts = <SOC_PERIPHERAL_IRQ(0) IRQ_TYPE_LEVEL_HIGH>, 133 "bus-err", "ec7tie1-0", "ec7tie2-0", 134 "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1", [all …]
|
H A D | r9a07g054.dtsi | 18 #clock-cells = <0>; 20 clock-frequency = <0>; 25 #clock-cells = <0>; 27 clock-frequency = <0>; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 40 #clock-cells = <0>; 42 clock-frequency = <0>; 45 cluster0_opp: opp-table-0 { 74 #size-cells = <0>; [all …]
|
H A D | r9a07g044.dtsi | 18 #clock-cells = <0>; 20 clock-frequency = <0>; 25 #clock-cells = <0>; 27 clock-frequency = <0>; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 40 #clock-cells = <0>; 42 clock-frequency = <0>; 45 cluster0_opp: opp-table-0 { 74 #size-cells = <0>; [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | renesas,rzg2l-irqc.yaml | 38 const: 0 189 reg = <0x110a0000 0x10000>; 191 #address-cells = <0>; 193 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/ |
H A D | sparx5_main.c | 55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */ 56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */ 57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */ 58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */ 59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */ 60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */ 61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */ 62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */ 63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */ 64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */ [all …]
|
/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk322x.dtsi | 26 #size-cells = <0>; 31 reg = <0xf00>; 43 reg = <0xf01>; 53 reg = <0xf02>; 63 reg = <0xf03>; 71 cpu0_opp_table: opp-table-0 { 127 #clock-cells = <0>; 137 reg = <0x100b0000 0x4000>; 144 pinctrl-0 = <&i2s1_bus>; 150 reg = <0x100c0000 0x4000>; [all …]
|