Lines Matching +full:0 +full:x110a0000

17 		#size-cells = <0>;
19 		cpu0: cpu@0 {
21 			reg = <0>;
30 		L3_CA55: cache-controller-0 {
33 			cache-size = <0x40000>;
70 		reg = <0 0x110a0000 0 0x10000>;
72 		#address-cells = <0>;
74 		interrupts = <SOC_PERIPHERAL_IRQ(0) IRQ_TYPE_LEVEL_HIGH>,
133 				  "bus-err", "ec7tie1-0", "ec7tie2-0",
134 				  "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",
146 		#address-cells = <0>;
148 		reg = <0x0 0x11900000 0 0x20000>,
149 		      <0x0 0x11940000 0 0x40000>;