Searched +full:0 +full:x04a90000 (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/display/ti/ |
H A D | ti,j721e-dss.yaml | 27 - description: common_s0 DSS Shared common 0 91 - description: common_s0 DSS Shared common 0 113 port@0: 159 reg = <0x04a00000 0x10000>, /* common_m */ 160 <0x04a10000 0x10000>, /* common_s0*/ 161 <0x04b00000 0x10000>, /* common_s1*/ 162 <0x04b10000 0x10000>, /* common_s2*/ 163 <0x04a20000 0x10000>, /* vidl1 */ 164 <0x04a30000 0x10000>, /* vidl2 */ 165 <0x04a50000 0x10000>, /* vid1 */ [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | qcm2290.dtsi | 27 #clock-cells = <0>; 33 #clock-cells = <0>; 39 #size-cells = <0>; 41 CPU0: cpu@0 { 44 reg = <0x0 0x0>; 45 clocks = <&cpufreq_hw 0>; 50 qcom,freq-domain = <&cpufreq_hw 0>; 63 reg = <0x0 0x1>; 64 clocks = <&cpufreq_hw 0>; 69 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sm6115.dtsi | 27 #clock-cells = <0>; 32 #clock-cells = <0>; 38 #size-cells = <0>; 40 CPU0: cpu@0 { 43 reg = <0x0 0x0>; 44 clocks = <&cpufreq_hw 0>; 49 qcom,freq-domain = <&cpufreq_hw 0>; 62 reg = <0x0 0x1>; 63 clocks = <&cpufreq_hw 0>; 68 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sm6125.dtsi | 23 #clock-cells = <0>; 30 #clock-cells = <0>; 38 #size-cells = <0>; 40 CPU0: cpu@0 { 43 reg = <0x0 0x0>; 57 reg = <0x0 0x1>; 66 reg = <0x0 0x2>; 75 reg = <0x0 0x3>; 84 reg = <0x0 0x100>; 98 reg = <0x0 0x101>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j721s2-main.dtsi | 13 #clock-cells = <0>; 15 clock-frequency = <0>; 22 reg = <0x0 0x70000000 0x0 0x400000>; 25 ranges = <0x0 0x0 0x70000000 0x400000>; 27 atf-sram@0 { 28 reg = <0x0 0x20000>; 32 reg = <0x1f0000 0x10000>; 36 reg = <0x200000 0x200000>; 42 reg = <0x00 0x00104000 0x00 0x18000>; 45 ranges = <0x00 0x00 0x00104000 0x18000>; [all …]
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H A D | k3-j721e-main.dtsi | 15 #clock-cells = <0>; 17 clock-frequency = <0>; 21 #clock-cells = <0>; 23 clock-frequency = <0>; 30 reg = <0x0 0x70000000 0x0 0x800000>; 33 ranges = <0x0 0x0 0x70000000 0x800000>; 35 atf-sram@0 { 36 reg = <0x0 0x20000>; 42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */ 45 ranges = <0x0 0x0 0x00100000 0x1c000>; [all …]
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