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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dfsl,imx6ull-pxp.yaml83 reg = <0x021cc000 0x4000>;
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp.dtsi11 reg = <0x00940000 0x20000>;
12 ranges = <0 0x00940000 0x20000>;
20 reg = <0x00960000 0x20000>;
21 ranges = <0 0x00960000 0x20000>;
30 reg = <0x021c8000 0x1000>;
39 reg = <0x021c9000 0x1000>;
48 reg = <0x021ca000 0x1000>;
57 reg = <0x021cb000 0x1000>;
66 reg = <0x021cc000 0x1000>;
75 reg = <0x021cd000 0x1000>;
[all …]
H A Dimx6ul.dtsi58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x00900000 0x20000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6qp.dtsi11 reg = <0x00940000 0x20000>;
17 reg = <0x00960000 0x20000>;
24 reg = <0x021c8000 0x1000>;
33 reg = <0x021c9000 0x1000>;
42 reg = <0x021ca000 0x1000>;
51 reg = <0x021cb000 0x1000>;
60 reg = <0x021cc000 0x1000>;
69 reg = <0x021cd000 0x1000>;
81 interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
82 <0 119 IRQ_TYPE_LEVEL_HIGH>;
H A Dimx6ull.dtsi53 #size-cells = <0>;
55 cpu0: cpu@0 {
58 reg = <0>;
90 reg = <0x00a01000 0x1000>,
91 <0x00a02000 0x100>;
96 #size-cells = <0>;
98 ckil: clock@0 {
100 reg = <0>;
101 #clock-cells = <0>;
109 #clock-cells = <0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl-imx-drm.txt38 - port@[0-3]: Port nodes with endpoint definitions as defined in
40 Ports 0 and 1 should correspond to CSI0 and CSI1,
47 #size-cells = <0>;
49 reg = <0x18000000 0x080000000>;
81 reg = <0x021c8000 0x1000>;
106 reg = <0x021cc000 0x1000>;
125 - port@[0-1]: Port nodes with endpoint definitions as defined in
127 Port 0 is the input port connected to the IPU display interface,
137 port@0 {
138 reg = <0>;
/openbmc/qemu/include/hw/arm/
H A Dfsl-imx6ul.h97 FSL_IMX6UL_MMDC_ADDR = 0x80000000,
100 FSL_IMX6UL_QSPI1_MEM_ADDR = 0x60000000,
103 FSL_IMX6UL_EIM_ALIAS_ADDR = 0x58000000,
106 FSL_IMX6UL_EIM_CS_ADDR = 0x50000000,
109 FSL_IMX6UL_AES_ENCRYPT_ADDR = 0x10000000,
112 FSL_IMX6UL_QSPI1_RX_ADDR = 0x0C000000,
116 FSL_IMX6UL_UART6_ADDR = 0x021FC000,
118 FSL_IMX6UL_I2C4_ADDR = 0x021F8000,
120 FSL_IMX6UL_UART5_ADDR = 0x021F4000,
121 FSL_IMX6UL_UART4_ADDR = 0x021F0000,
[all …]