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/openbmc/u-boot/board/bticino/mamoj/
H A DREADME44 0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
48 hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
53 hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
69 => mmc partconf 2 1 0 0
73 => ums 0 mmc 2
80 => dfu 0 mmc 2
89 => dfu 0 mmc 2
111 => mmc write $kernel_addr_r 0x1000 0x4000
118 => mmc write 0x13000000 0x800 0x800
/openbmc/u-boot/arch/arm/dts/
H A Dk3-am65.dtsi59 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
60 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
61 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
62 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
63 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
65 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
66 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
67 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
68 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
69 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
[all …]
/openbmc/u-boot/doc/imx/misc/
H A Dsdp.txt56 0x1b67:0x4fff, mx6_usb_sdp_spl.conf
61 hid,uboot_header,1024,0x910000,0x10000000,1G,0x00900000,0x40000
77 hid,1024,0x10000000,1G,0x00907000,0x31000
78 full.itb:load 0x12100000
79 boot.scr:load 0x12000000,jump 0x12000000
85 0x15a2:0x0061, mx6_usb_rom.conf, 0x1b67:0x4fff, mx6_usb_sdp_spl.conf
93 hid,1024,0x910000,0x10000000,1G,0x00900000,0x40000
99 hid,uboot_header,1024,0x10000000,1G,0x00907000,0x31000
/openbmc/linux/drivers/remoteproc/
H A Dimx_rproc.c28 #define IMX7D_SRC_SCR 0x0C
32 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
46 #define IMX8M_GPR22 0x58
47 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0)
49 /* Address: 0x020D8000 */
50 #define IMX6SX_SRC_SCR 0x00
66 #define IMX_SIP_RPROC 0xC2000005
67 #define IMX_SIP_RPROC_START 0x00
68 #define IMX_SIP_RPROC_STARTED 0x01
69 #define IMX_SIP_RPROC_STOP 0x02
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi54 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
57 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
58 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
60 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
62 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
63 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
64 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
H A Dk3-j721e.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xC000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xC000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
114 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
/openbmc/u-boot/configs/
H A Ddh_imx6_defconfig3 CONFIG_SYS_TEXT_BASE=0x17800000
41 CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
44 CONFIG_SF_DEFAULT_MODE=0
60 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
61 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
H A Dtqma6s_wru4_mmc_defconfig3 CONFIG_SYS_TEXT_BASE=0x2fc00000
40 CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
43 CONFIG_LED_STATUS_BIT=0
/openbmc/u-boot/include/configs/
H A Dstm32f469-discovery.h10 #define CONFIG_SYS_FLASH_BASE 0x08000000
12 #define CONFIG_SYS_INIT_SP_ADDR 0x10010000
17 #define CONFIG_SYS_LOAD_ADDR 0x00400000
18 #define CONFIG_LOADADDR 0x00400000
41 func(MMC, mmc, 0)
45 "kernel_addr_r=0x00008000\0" \
46 "fdtfile=stm32f469-disco.dtb\0" \
47 "fdt_addr_r=0x00700000\0" \
48 "scriptaddr=0x00800000\0" \
49 "pxefile_addr_r=0x00800000\0" \
[all …]
H A Dstm32f429-evaluation.h10 #define CONFIG_SYS_FLASH_BASE 0x08000000
12 #define CONFIG_SYS_INIT_SP_ADDR 0x10010000
17 #define CONFIG_SYS_LOAD_ADDR 0x00400000
18 #define CONFIG_LOADADDR 0x00400000
41 func(MMC, mmc, 0)
45 "kernel_addr_r=0x00008000\0" \
46 "fdtfile=stm32429i-eval.dtb\0" \
47 "fdt_addr_r=0x00700000\0" \
48 "scriptaddr=0x00800000\0" \
49 "pxefile_addr_r=0x00800000\0" \
[all …]
H A Dmx7_common.h25 #define CONFIG_SYS_BOOTM_LEN 0x1000000
30 #define CONFIG_LOADADDR 0x80800000
48 #define CONFIG_ARMV7_SECURE_BASE 0x00900000
54 #define CONFIG_CSF_SIZE 0x2000
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-ts219.dtsi8 reg = <0x00000000 0x20000000>;
23 reg = <0x30>;
34 reg = <0x12100 0x100>;
40 m25p128@0 {
44 reg = <0>;
46 mode = <0>;
48 partition@0 {
49 reg = <0x00000000 0x00080000>;
54 reg = <0x00200000 0x00200000>;
59 reg = <0x00400000 0x00900000>;
[all …]
H A Darmada-382-rd-ac3x-48g4x2xl.dts29 reg = <0x00000000 0x20000000>; /* 512MB */
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
40 pinctrl-0 = <&i2c0_pins>;
45 reg = <0x53>;
48 /* CPLD device present at 0x3c. Function unknown */
53 pinctrl-0 = <&uart0_pins>;
65 pinctrl-0 = <&mdio_pins>;
67 phy0: ethernet-phy@0 {
68 reg = <0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-ipq8064.yaml63 reg = <0x00900000 0x4000>;
H A Dqcom,gcc-apq8064.yaml81 reg = <0x00900000 0x4000>;
91 interrupts = <0 178 4>;
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm953012hr.dts50 reg = <0x80000000 0x10000000>;
55 partition@0 {
57 reg = <0x00000000 0x00200000>;
62 reg = <0x00200000 0x00400000>;
66 reg = <0x00600000 0x00a00000>;
70 reg = <0x01000000 0x07000000>;
82 partition@0 {
84 reg = <0x00000000 0x000d0000>;
88 reg = <0x000d0000 0x00030000>;
92 reg = <0x00100000 0x00600000>;
[all …]
H A Dbcm953012k.dts48 reg = <0x80000000 0x10000000>;
53 nand@0 {
55 reg = <0>;
64 partition@0 {
66 reg = <0x00000000 0x00200000>;
71 reg = <0x00200000 0x00400000>;
75 reg = <0x00600000 0x00a00000>;
79 reg = <0x01000000 0x07000000>;
92 partition@0 {
94 reg = <0x00000000 0x000d0000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
86 reg = <0x00900000 0x20000>;
87 ranges = <0 0x00900000 0x20000>;
95 reg = <0x020f0000 0x4000>;
96 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
100 reg = <0x020f4000 0x4000>;
101 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
108 #size-cells = <0>;
[all …]
H A Dimx6q.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0>;
165 reg = <0x00900000 0x40000>;
166 ranges = <0 0x00900000 0x40000>;
176 #size-cells = <0>;
178 reg = <0x02018000 0x4000>;
179 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
192 reg = <0x02200000 0x4000>;
193 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dcoredump.c16 .start = 0xe003b400,
17 .len = 0x00003bff,
24 .start = 0x00800000,
25 .len = 0x0005ffff,
29 .start = 0x00900000,
30 .len = 0x00013fff,
34 .start = 0x02200000,
35 .len = 0x0004ffff,
39 .start = 0x02300000,
40 .len = 0x0004ffff,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6125-tlmm.yaml73 - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
113 reg = <0x00500000 0x400000>,
114 <0x00900000 0x400000>,
115 <0x00d00000 0x400000>;
119 gpio-ranges = <&tlmm 0 0 134>;
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91sam9g45.h17 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
24 #define ATMEL_ID_USART0 7 /* USART 0 */
28 #define ATMEL_ID_MCI0 11 /* High Speed Multimedia Card Interface 0 */
29 #define ATMEL_ID_TWI0 12 /* Two-Wire Interface 0 */
31 #define ATMEL_ID_SPI0 14 /* Serial Peripheral Interface 0 */
33 #define ATMEL_ID_SSC0 16 /* Synchronous Serial Controller 0 */
35 #define ATMEL_ID_TCB 18 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
53 #define ATMEL_BASE_UDPHS 0xfff78000
54 #define ATMEL_BASE_TC0 0xfff7c000
55 #define ATMEL_BASE_TC1 0xfff7c040
[all …]
H A Dsama5d3.h18 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
30 #define ATMEL_ID_USART0 12 /* USART 0 */
36 #define ATMEL_ID_TWI0 18 /* Two-Wire Interface 0 */
39 #define ATMEL_ID_MCI0 21 /* High Speed Multimedia Card Interface 0 */
42 #define ATMEL_ID_SPI0 24 /* Serial Peripheral Interface 0 */
56 #define ATMEL_ID_SSC0 38 /* Synchronous Serial Controller 0 */
70 #define ARCH_ID_SAMA5D3 0x8a5c07c0
71 #define ARCH_EXID_SAMA5D31 0x00444300
72 #define ARCH_EXID_SAMA5D33 0x00414300
73 #define ARCH_EXID_SAMA5D34 0x00414301
[all …]
/openbmc/linux/drivers/net/wireless/ti/wl18xx/
H A Dreg.h11 #define WL18XX_REGISTERS_BASE 0x00800000
12 #define WL18XX_CODE_BASE 0x00000000
13 #define WL18XX_DATA_BASE 0x00400000
14 #define WL18XX_DOUBLE_BUFFER_BASE 0x00600000
15 #define WL18XX_MCU_KEY_SEARCH_BASE 0x00700000
16 #define WL18XX_PHY_BASE 0x00900000
17 #define WL18XX_TOP_OCP_BASE 0x00A00000
18 #define WL18XX_PACKET_RAM_BASE 0x00B00000
19 #define WL18XX_HOST_BASE 0x00C00000
21 #define WL18XX_REGISTERS_DOWN_SIZE 0x0000B000
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dc293pcie.dts46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
58 reg = <0xf 0xffe0a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0x80000000
[all …]

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