| /openbmc/linux/arch/parisc/include/uapi/asm/ |
| H A D | termbits.h | 42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x4000
65 #define IUTF8 0x8000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
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| /openbmc/linux/include/uapi/asm-generic/ |
| H A D | termbits.h | 42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x2000
65 #define IUTF8 0x4000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
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| /openbmc/linux/arch/mips/include/uapi/asm/ |
| H A D | termbits.h | 55 #define VINTR 0 /* Interrupt character [ISIG] */
67 #if 0
81 #define IUCLC 0x0200 /* Map upper case to lower case on input */
82 #define IXON 0x0400 /* Enable start/stop output control */
83 #define IXOFF 0x1000 /* Enable start/stop input control */
84 #define IMAXBEL 0x2000 /* Ring bell when input queue is full */
85 #define IUTF8 0x4000 /* Input is UTF-8 */
88 #define OLCUC 0x00002 /* Map lower case to upper case on output */
89 #define ONLCR 0x00004 /* Map NL to CR-NL on output */
90 #define NLDLY 0x00100
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| /openbmc/linux/arch/sparc/include/uapi/asm/ |
| H A D | termbits.h | 51 #define VINTR 0
78 #define IUCLC 0x0200
79 #define IXON 0x0400
80 #define IXOFF 0x1000
81 #define IMAXBEL 0x2000
82 #define IUTF8 0x4000
85 #define OLCUC 0x00002
86 #define ONLCR 0x00004
87 #define NLDLY 0x00100
88 #define NL0 0x00000
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| /openbmc/qemu/hw/riscv/ |
| H A D | shakti_c.c | 35 [SHAKTI_C_ROM] = { 0x00001000, 0x2000 },
36 [SHAKTI_C_RAM] = { 0x80000000, 0x0 },
37 [SHAKTI_C_UART] = { 0x00011300, 0x00040 },
38 [SHAKTI_C_GPIO] = { 0x020d0000, 0x00100 },
39 [SHAKTI_C_PLIC] = { 0x0c000000, 0x20000 },
40 [SHAKTI_C_CLINT] = { 0x02000000, 0xc0000 },
41 [SHAKTI_C_I2C] = { 0x20c00000, 0x00100 },
67 shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0); in shakti_c_machine_state_init()
112 (char *)SHAKTI_C_PLIC_HART_CONFIG, ms->smp.cpus, 0, in type_init()
124 0, 1, false); in type_init()
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | cpu.c | 49 case 0x00001: in get_reset_cause()
50 case 0x00011: in get_reset_cause()
52 case 0x00004: in get_reset_cause()
54 case 0x00008: in get_reset_cause()
56 case 0x00010: in get_reset_cause()
62 case 0x00020: in get_reset_cause()
64 case 0x00040: in get_reset_cause()
66 case 0x00080: in get_reset_cause()
69 case 0x00100: in get_reset_cause()
71 case 0x00200: in get_reset_cause()
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| /openbmc/linux/arch/x86/events/ |
| H A D | perf_event_flags.h | 5 PERF_ARCH(PEBS_LDLAT, 0x00001) /* ld+ldlat data address sampling */
6 PERF_ARCH(PEBS_ST, 0x00002) /* st data address sampling */
7 PERF_ARCH(PEBS_ST_HSW, 0x00004) /* haswell style datala, store */
8 PERF_ARCH(PEBS_LD_HSW, 0x00008) /* haswell style datala, load */
9 PERF_ARCH(PEBS_NA_HSW, 0x00010) /* haswell style datala, unknown */
10 PERF_ARCH(EXCL, 0x00020) /* HT exclusivity on counter */
11 PERF_ARCH(DYNAMIC, 0x00040) /* dynamic alloc'd constraint */
12 /* 0x00080 */
13 PERF_ARCH(EXCL_ACCT, 0x00100) /* accounted EXCL event */
14 PERF_ARCH(AUTO_RELOAD, 0x00200) /* use PEBS auto-reload */
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| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | lapic.h | 11 #define LAPIC_DEFAULT_BASE 0xfee00000
13 #define LAPIC_ID 0x020
14 #define LAPIC_LVR 0x030
16 #define LAPIC_TASKPRI 0x080
17 #define LAPIC_TPRI_MASK 0xff
19 #define LAPIC_RRR 0x0c0
21 #define LAPIC_SPIV 0x0f0
22 #define LAPIC_SPIV_ENABLE 0x100
24 #define LAPIC_ICR 0x300
25 #define LAPIC_DEST_SELF 0x40000
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| /openbmc/linux/Documentation/devicetree/bindings/media/cec/ |
| H A D | amlogic,meson-gx-ao-cec.yaml | 87 reg = <0x00100 0x14>;
|
| /openbmc/u-boot/drivers/video/ |
| H A D | logicore_dp_dpcd.h | 16 #define DPCD_REV 0x00000
17 #define DPCD_MAX_LINK_RATE 0x00001
18 #define DPCD_MAX_LANE_COUNT 0x00002
19 #define DPCD_MAX_DOWNSPREAD 0x00003
20 #define DPCD_NORP_PWR_V_CAP 0x00004
21 #define DPCD_DOWNSP_PRESENT 0x00005
22 #define DPCD_ML_CH_CODING_CAP 0x00006
23 #define DPCD_DOWNSP_COUNT_MSA_OUI 0x00007
24 #define DPCD_RX_PORT0_CAP_0 0x00008
25 #define DPCD_RX_PORT0_CAP_1 0x00009
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| /openbmc/linux/drivers/usb/gadget/udc/ |
| H A D | goku_udc.h | 12 * PCI BAR 0 points to these registers.
16 u32 int_status; /* 0x000 */
18 #define INT_SUSPEND 0x00001 /* or resume */
19 #define INT_USBRESET 0x00002
20 #define INT_ENDPOINT0 0x00004
21 #define INT_SETUP 0x00008
22 #define INT_STATUS 0x00010
23 #define INT_STATUSNAK 0x00020
24 #define INT_EPxDATASET(n) (0x00020 << (n)) /* 0 < n < 4 */
25 # define INT_EP1DATASET 0x00040
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| /openbmc/linux/tools/testing/selftests/kvm/include/x86_64/ |
| H A D | apic.h | 15 #define APIC_DEFAULT_GPA 0xfee00000ULL
18 #define MSR_IA32_APICBASE 0x0000001b
22 #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
25 #define APIC_BASE_MSR 0x800
27 #define APIC_ID 0x20
28 #define APIC_LVR 0x30
29 #define GET_APIC_ID_FIELD(x) (((x) >> 24) & 0xFF)
30 #define APIC_TASKPRI 0x80
31 #define APIC_PROCPRI 0xA0
32 #define APIC_EOI 0xB0
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| /openbmc/linux/drivers/gpu/drm/arm/ |
| H A D | malidp_regs.h | 20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0)
34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0)
50 #define MALIDP550_SE_IRQ_EOW (1 << 0)
54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0)
67 #define MALIDP_CFG_VALID (1 << 0)
68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0)
75 #define MALIDP_REG_STATUS 0x00000
76 #define MALIDP_REG_SETIRQ 0x00004
77 #define MALIDP_REG_MASKIRQ 0x00008
78 #define MALIDP_REG_CLEARIRQ 0x0000c
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | dp.h | 12 #define DPCD_RC00_DPCD_REV 0x00000
13 #define DPCD_RC01_MAX_LINK_RATE 0x00001
14 #define DPCD_RC02 0x00002
15 #define DPCD_RC02_ENHANCED_FRAME_CAP 0x80
16 #define DPCD_RC02_TPS3_SUPPORTED 0x40
17 #define DPCD_RC02_MAX_LANE_COUNT 0x1f
18 #define DPCD_RC03 0x00003
19 #define DPCD_RC03_TPS4_SUPPORTED 0x80
20 #define DPCD_RC03_MAX_DOWNSPREAD 0x01
21 #define DPCD_RC0E 0x0000e
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| /openbmc/linux/arch/powerpc/include/asm/nohash/32/ |
| H A D | pte-85xx.h | 12 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
20 #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
21 #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
22 #define _PAGE_RW 0x00004 /* S: Write permission (SW) */
23 #define _PAGE_DIRTY 0x00008 /* S: Page dirty */
24 #define _PAGE_EXEC 0x00010 /* H: SX permission */
25 #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
27 #define _PAGE_ENDIAN 0x00040 /* H: E bit */
28 #define _PAGE_GUARDED 0x00080 /* H: G bit */
29 #define _PAGE_COHERENT 0x00100 /* H: M bit */
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| /openbmc/linux/drivers/net/ethernet/intel/ixgbevf/ |
| H A D | regs.h | 7 #define IXGBE_VFCTRL 0x00000
8 #define IXGBE_VFSTATUS 0x00008
9 #define IXGBE_VFLINKS 0x00010
10 #define IXGBE_VFFRTIMER 0x00048
11 #define IXGBE_VFRXMEMWRAP 0x03190
12 #define IXGBE_VTEICR 0x00100
13 #define IXGBE_VTEICS 0x00104
14 #define IXGBE_VTEIMS 0x00108
15 #define IXGBE_VTEIMC 0x0010C
16 #define IXGBE_VTEIAC 0x00110
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| /openbmc/linux/arch/powerpc/include/uapi/asm/ |
| H A D | termbits.h | 48 #define VINTR 0
67 #define IXON 0x0200
68 #define IXOFF 0x0400
69 #define IUCLC 0x1000
70 #define IMAXBEL 0x2000
71 #define IUTF8 0x4000
74 #define ONLCR 0x00002
75 #define OLCUC 0x00004
76 #define NLDLY 0x00300
77 #define NL0 0x00000
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| /openbmc/linux/arch/alpha/include/uapi/asm/ |
| H A D | termbits.h | 54 #define VEOF 0
73 #define IXON 0x0200
74 #define IXOFF 0x0400
75 #define IUCLC 0x1000
76 #define IMAXBEL 0x2000
77 #define IUTF8 0x4000
80 #define ONLCR 0x00002
81 #define OLCUC 0x00004
82 #define NLDLY 0x00300
83 #define NL0 0x00000
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| /openbmc/u-boot/arch/arm/include/asm/ti-common/ |
| H A D | keystone_net.h | 18 #define GBETH_BASE (CONFIG_KSNET_NETCP_BASE + 0x00090000)
19 #define EMAC_EMACSL_BASE_ADDR (GBETH_BASE + 0x900)
20 #define EMAC_MDIO_BASE_ADDR (GBETH_BASE + 0x300)
21 #define EMAC_SGMII_BASE_ADDR (GBETH_BASE + 0x100)
22 #define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x) * 0x040)
25 #define CPGMACSL_REG_CTL 0x04
26 #define CPGMACSL_REG_STATUS 0x08
27 #define CPGMACSL_REG_RESET 0x0c
28 #define CPGMACSL_REG_MAXLEN 0x10
32 #define GBETH_BASE (CONFIG_KSNET_NETCP_BASE + 0x00200000)
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| /openbmc/u-boot/include/asm-generic/ |
| H A D | global_data.h | 142 #define gd_board_type() 0
148 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
149 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
150 #define GD_FLG_SILENT 0x00004 /* Silent mode */
151 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
152 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
153 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
154 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
155 #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
156 #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
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| /openbmc/linux/arch/mips/include/asm/ |
| H A D | msc01_ic.h | 18 #define MSC01_IC_RST_OFS 0x00008 /* Software reset */
19 #define MSC01_IC_ENAL_OFS 0x00100 /* Int_in enable mask 31:0 */
20 #define MSC01_IC_ENAH_OFS 0x00108 /* Int_in enable mask 63:32 */
21 #define MSC01_IC_DISL_OFS 0x00120 /* Int_in disable mask 31:0 */
22 #define MSC01_IC_DISH_OFS 0x00128 /* Int_in disable mask 63:32 */
23 #define MSC01_IC_ISBL_OFS 0x00140 /* Raw int_in 31:0 */
24 #define MSC01_IC_ISBH_OFS 0x00148 /* Raw int_in 63:32 */
25 #define MSC01_IC_ISAL_OFS 0x00160 /* Masked int_in 31:0 */
26 #define MSC01_IC_ISAH_OFS 0x00168 /* Masked int_in 63:32 */
27 #define MSC01_IC_LVL_OFS 0x00180 /* Disable priority int_out */
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| /openbmc/linux/drivers/memstick/host/ |
| H A D | tifm_ms.c | 29 #define TIFM_MS_STAT_DRQ 0x04000
30 #define TIFM_MS_STAT_MSINT 0x02000
31 #define TIFM_MS_STAT_RDY 0x01000
32 #define TIFM_MS_STAT_CRC 0x00200
33 #define TIFM_MS_STAT_TOE 0x00100
34 #define TIFM_MS_STAT_EMP 0x00020
35 #define TIFM_MS_STAT_FUL 0x00010
36 #define TIFM_MS_STAT_CED 0x00008
37 #define TIFM_MS_STAT_ERR 0x00004
38 #define TIFM_MS_STAT_BRQ 0x00002
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| /openbmc/linux/drivers/gpu/drm/renesas/rcar-du/ |
| H A D | rcar_du_regs.h | 13 #define DU0_REG_OFFSET 0x00000
14 #define DU1_REG_OFFSET 0x30000
15 #define DU2_REG_OFFSET 0x40000
16 #define DU3_REG_OFFSET 0x70000
22 #define DSYSR 0x00000 /* display 1 */
28 #define DSYSR_TVM_MASTER (0 << 6)
32 #define DSYSR_SCM_INT_NONE (0 << 4)
37 #define DSMR 0x00004
40 #define DSMR_DIPM_DISP (0 << 25)
50 #define DSMR_CDEM_CDE (0 << 13)
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| /openbmc/linux/drivers/scsi/aic7xxx/ |
| H A D | aic79xx.h | 60 #define FALSE 0
63 #define ALL_CHANNELS '\0'
64 #define ALL_TARGETS_MASK 0xFFFF
65 #define INITIATOR_WILDCARD (~0)
66 #define SCB_LIST_NULL 0xFF00
68 #define QOUTFIFO_ENTRY_VALID 0x80
69 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
76 #define SCB_IS_SCSIBUS_B(ahd, scb) (0)
88 (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb)))
91 ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \
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| /openbmc/linux/drivers/scsi/ibmvscsi_tgt/ |
| H A D | ibmvscsi_tgt.h | 27 #define MSG_HI 0
36 #define SRP_VIOLATION 0x102 /* general error code */
55 #define LOCAL 0
70 #define ADAPT_SUCCESS 0L
139 SCSI_CDB = 0x01,
140 TASK_MANAGEMENT = 0x02,
141 /* MAD or addressed to port 0 */
142 ADAPTER_MAD = 0x04,
143 UNSET_TYPE = 0x08,
166 #define CMD_FAST_FAIL BIT(0)
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