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/openbmc/openpower-pnor-code-mgmt/test/
H A Dtest_item_updater_static.cpp22 "TOC@0x00000000 Partitions:\n" in TEST()
24 "ID=00 part 0x00000000..0x00002000 (actual=0x00002000) " in TEST()
26 "ID=01 HBEL 0x00008000..0x0002c000 (actual=0x00024000) " in TEST()
28 "ID=02 GUARD 0x0002c000..0x00031000 (actual=0x00005000) " in TEST()
30 "ID=03 NVRAM 0x00031000..0x000c1000 (actual=0x00090000) " in TEST()
32 "ID=04 SECBOOT 0x000c1000..0x000e5000 (actual=0x00024000) " in TEST()
34 "ID=05 DJVPD 0x000e5000..0x0012d000 (actual=0x00048000) " in TEST()
36 "ID=06 MVPD 0x0012d000..0x001bd000 (actual=0x00090000) " in TEST()
38 "ID=07 CVPD 0x001bd000..0x00205000 (actual=0x00048000) " in TEST()
40 "ID=08 HBB 0x00205000..0x00305000 (actual=0x00100000) " in TEST()
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap4460.dtsi12 cpu0: cpu@0 {
32 reg = <0x4a002260 0x4
33 0x4a00232C 0x4
34 0x4a002378 0x18>;
36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
39 #thermal-sensor-cells = <0>;
45 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
46 <0x4A002268 0x4>;
52 1025000 0 0 0 0 0
53 1200000 0 0 0 0 0
[all …]
H A Domap5-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x49000000 0x49000000 0x100000>;
12 segment@0 { /* 0x40100000 */
18 <0x00000000 0x00000000 0x000400>, /* ap 0 */
19 <0x00000400 0x00000400 0x000400>, /* ap 1 */
20 <0x00022000 0x00022000 0x001000>, /* ap 2 */
21 <0x00023000 0x00023000 0x001000>, /* ap 3 */
[all …]
H A Domap4-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x49000000 0x49000000 0x100000>;
12 segment@0 { /* 0x40100000 */
18 <0x00000000 0x00000000 0x000400>, /* ap 0 */
19 <0x00000400 0x00000400 0x000400>, /* ap 1 */
20 <0x00022000 0x00022000 0x001000>, /* ap 2 */
21 <0x00023000 0x00023000 0x001000>, /* ap 3 */
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dbrcm,bus-axi.txt26 reg = <0x18000000 0x1000>;
27 ranges = <0x00000000 0x18000000 0x00100000>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
33 /* Ethernet Controller 0 */
34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
39 /* PCIe Controller 0 */
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt43 reg = <0x50000000 0x00024000>;
44 interrupts = <0 65 0x04 /* mpcore syncpt */
45 0 67 0x04>; /* mpcore general */
51 ranges = <0x54000000 0x54000000 0x04000000>;
55 reg = <0x54200000 0x00040000>;
56 interrupts = <0 73 0x04>;
79 nvidia,pwm = <&pwm 2 0>;
80 nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
81 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.yaml175 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
202 - description: host1x syncpoint interrupt 0
226 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
240 reg = <0x50000000 0x00024000>;
241 interrupts = <0 65 0x04>, /* mpcore syncpt */
242 <0 67 0x04>; /* mpcore general */
252 ranges = <0x54000000 0x54000000 0x04000000>;
256 reg = <0x54040000 0x00040000>;
257 interrupts = <0 68 0x04>;
265 reg = <0x54080000 0x00040000>;
[all …]
/openbmc/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/openbmc/linux/drivers/net/ipa/reg/
H A Dgsi_reg-v5.0.c12 0x0000c01c + 0x1000 * GSI_EE_AP);
15 0x0000c028 + 0x1000 * GSI_EE_AP);
18 [CHTYPE_PROTOCOL] = GENMASK(6, 0),
27 0x00014000 + 0x12000 * GSI_EE_AP, 0x80);
30 [CH_R_LENGTH] = GENMASK(23, 0),
35 0x00014004 + 0x12000 * GSI_EE_AP, 0x80);
37 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x00014008 + 0x12000 * GSI_EE_AP, 0x80);
39 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001400c + 0x12000 * GSI_EE_AP, 0x80);
42 [WRR_WEIGHT] = GENMASK(3, 0),
54 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x00014048 + 0x12000 * GSI_EE_AP, 0x80);
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-ns.dtsi19 ranges = <0x00000000 0x18000000 0x00001000>;
25 reg = <0x0300 0x100>;
33 reg = <0x0400 0x100>;
37 pinctrl-0 = <&pinmux_uart1>;
44 ranges = <0x00000000 0x19000000 0x00023000>;
50 reg = <0x20000 0x100>;
55 reg = <0x20200 0x100>;
62 reg = <0x20600 0x20>;
71 #address-cells = <0>;
73 reg = <0x21000 0x1000>,
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt244 reg = <0x50000000 0x00024000>;
245 interrupts = <0 65 0x04 /* mpcore syncpt */
246 0 67 0x04>; /* mpcore general */
254 ranges = <0x54000000 0x54000000 0x04000000>;
258 reg = <0x54040000 0x00040000>;
259 interrupts = <0 68 0x04>;
267 reg = <0x54080000 0x00040000>;
268 interrupts = <0 69 0x04>;
276 reg = <0x540c0000 0x00040000>;
277 interrupts = <0 70 0x04>;
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h12 #define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */
13 #define IPU_SOC_BASE_ADDR 0x40000000
14 #define IPU_SOC_OFFSET 0x1E000000
15 #define SPBA0_BASE_ADDR 0x70000000
16 #define AIPS1_BASE_ADDR 0x73F00000
17 #define AIPS2_BASE_ADDR 0x83F00000
18 #define CSD0_BASE_ADDR 0x90000000
19 #define CSD1_BASE_ADDR 0xA0000000
20 #define NFC_BASE_ADDR_AXI 0xCFFF0000
21 #define CS1_BASE_ADDR 0xB8000000
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h11 #define IRAM_BASE_ADDR 0x3F000000 /* internal ram */
12 #define IRAM_SIZE 0x00080000 /* 512 KB */
14 #define AIPS0_BASE_ADDR 0x40000000
15 #define AIPS1_BASE_ADDR 0x40080000
17 /* AIPS 0 */
18 #define MSCM_BASE_ADDR (AIPS0_BASE_ADDR + 0x00001000)
19 #define MSCM_IR_BASE_ADDR (AIPS0_BASE_ADDR + 0x00001800)
20 #define CA5SCU_BASE_ADDR (AIPS0_BASE_ADDR + 0x00002000)
21 #define CA5_INTD_BASE_ADDR (AIPS0_BASE_ADDR + 0x00003000)
22 #define CA5_L2C_BASE_ADDR (AIPS0_BASE_ADDR + 0x00006000)
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20.dtsi14 reg = <0x50000000 0x00024000>;
24 ranges = <0x54000000 0x54000000 0x04000000>;
28 reg = <0x54040000 0x00040000>;
37 reg = <0x54080000 0x00040000>;
46 reg = <0x540c0000 0x00040000>;
55 reg = <0x54100000 0x00040000>;
64 reg = <0x54140000 0x00040000>;
73 reg = <0x54180000 0x00040000>;
81 reg = <0x54200000 0x00040000>;
89 nvidia,head = <0>;
[all …]
H A Dtegra30.dtsi16 reg = <0x00003000 0x00000800 /* PADS registers */
17 0x00003800 0x00000200 /* AFI registers */
18 0x10000000 0x10000000>; /* configuration space */
25 interrupt-map-mask = <0 0 0 0>;
26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 bus-range = <0x00 0xff>;
32 ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
33 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
34 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
35 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
[all …]
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4.xml.h57 VG1 = 0,
67 MIXER0 = 0,
73 INTF_LCDC_DTV = 0,
85 FRAME_LINEAR = 0,
91 SCALE_FIR = 0,
97 DMA_P = 0,
102 #define MDP4_IRQ_OVERLAY0_DONE 0x00000001
103 #define MDP4_IRQ_OVERLAY1_DONE 0x00000002
104 #define MDP4_IRQ_DMA_S_DONE 0x00000004
105 #define MDP4_IRQ_DMA_E_DONE 0x00000008
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20.dtsi17 memory@0 {
19 reg = <0 0>;
24 reg = <0x40000000 0x40000>;
27 ranges = <0 0x40000000 0x40000>;
30 reg = <0x400 0x3fc00>;
37 reg = <0x50000000 0x00024000>;
51 ranges = <0x54000000 0x54000000 0x04000000>;
55 reg = <0x54040000 0x00040000>;
67 reg = <0x54080000 0x00040000>;
79 reg = <0x540c0000 0x00040000>;
[all …]
H A Dtegra30.dtsi20 reg = <0x80000000 0x0>;
26 reg = <0x00003000 0x00000800>, /* PADS registers */
27 <0x00003800 0x00000200>, /* AFI registers */
28 <0x10000000 0x10000000>; /* configuration space */
35 interrupt-map-mask = <0 0 0 0>;
36 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
38 bus-range = <0x00 0xff>;
42 ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
43 <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
44 <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]