1faf0678eSAlex Elder // SPDX-License-Identifier: GPL-2.0 2faf0678eSAlex Elder 3faf0678eSAlex Elder /* Copyright (C) 2023 Linaro Ltd. */ 4faf0678eSAlex Elder 5faf0678eSAlex Elder #include <linux/types.h> 6faf0678eSAlex Elder 7faf0678eSAlex Elder #include "../gsi.h" 8faf0678eSAlex Elder #include "../reg.h" 9faf0678eSAlex Elder #include "../gsi_reg.h" 10faf0678eSAlex Elder 11faf0678eSAlex Elder REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 12faf0678eSAlex Elder 0x0000c01c + 0x1000 * GSI_EE_AP); 13faf0678eSAlex Elder 14faf0678eSAlex Elder REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 15faf0678eSAlex Elder 0x0000c028 + 0x1000 * GSI_EE_AP); 16faf0678eSAlex Elder 17faf0678eSAlex Elder static const u32 reg_ch_c_cntxt_0_fmask[] = { 18faf0678eSAlex Elder [CHTYPE_PROTOCOL] = GENMASK(6, 0), 19faf0678eSAlex Elder [CHTYPE_DIR] = BIT(7), 20faf0678eSAlex Elder [CH_EE] = GENMASK(11, 8), 21faf0678eSAlex Elder [CHID] = GENMASK(19, 12), 22faf0678eSAlex Elder [CHSTATE] = GENMASK(23, 20), 23faf0678eSAlex Elder [ELEMENT_SIZE] = GENMASK(31, 24), 24faf0678eSAlex Elder }; 25faf0678eSAlex Elder 26faf0678eSAlex Elder REG_STRIDE_FIELDS(CH_C_CNTXT_0, ch_c_cntxt_0, 27faf0678eSAlex Elder 0x00014000 + 0x12000 * GSI_EE_AP, 0x80); 28faf0678eSAlex Elder 29faf0678eSAlex Elder static const u32 reg_ch_c_cntxt_1_fmask[] = { 30faf0678eSAlex Elder [CH_R_LENGTH] = GENMASK(23, 0), 31faf0678eSAlex Elder [ERINDEX] = GENMASK(31, 24), 32faf0678eSAlex Elder }; 33faf0678eSAlex Elder 34faf0678eSAlex Elder REG_STRIDE_FIELDS(CH_C_CNTXT_1, ch_c_cntxt_1, 35faf0678eSAlex Elder 0x00014004 + 0x12000 * GSI_EE_AP, 0x80); 36faf0678eSAlex Elder 37faf0678eSAlex Elder REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x00014008 + 0x12000 * GSI_EE_AP, 0x80); 38faf0678eSAlex Elder 39faf0678eSAlex Elder REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001400c + 0x12000 * GSI_EE_AP, 0x80); 40faf0678eSAlex Elder 41faf0678eSAlex Elder static const u32 reg_ch_c_qos_fmask[] = { 42faf0678eSAlex Elder [WRR_WEIGHT] = GENMASK(3, 0), 43faf0678eSAlex Elder /* Bits 4-7 reserved */ 44faf0678eSAlex Elder [MAX_PREFETCH] = BIT(8), 45faf0678eSAlex Elder [USE_DB_ENG] = BIT(9), 46faf0678eSAlex Elder [PREFETCH_MODE] = GENMASK(13, 10), 47faf0678eSAlex Elder /* Bits 14-15 reserved */ 48faf0678eSAlex Elder [EMPTY_LVL_THRSHOLD] = GENMASK(23, 16), 49faf0678eSAlex Elder [DB_IN_BYTES] = BIT(24), 50faf0678eSAlex Elder [LOW_LATENCY_EN] = BIT(25), 51faf0678eSAlex Elder /* Bits 26-31 reserved */ 52faf0678eSAlex Elder }; 53faf0678eSAlex Elder 54faf0678eSAlex Elder REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x00014048 + 0x12000 * GSI_EE_AP, 0x80); 55faf0678eSAlex Elder 56faf0678eSAlex Elder REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 57faf0678eSAlex Elder 0x0001404c + 0x12000 * GSI_EE_AP, 0x80); 58faf0678eSAlex Elder 59faf0678eSAlex Elder REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1, 60faf0678eSAlex Elder 0x00014050 + 0x12000 * GSI_EE_AP, 0x80); 61faf0678eSAlex Elder 62faf0678eSAlex Elder REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2, 63faf0678eSAlex Elder 0x00014054 + 0x12000 * GSI_EE_AP, 0x80); 64faf0678eSAlex Elder 65faf0678eSAlex Elder REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3, 66faf0678eSAlex Elder 0x00014058 + 0x12000 * GSI_EE_AP, 0x80); 67faf0678eSAlex Elder 68faf0678eSAlex Elder static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { 69faf0678eSAlex Elder [EV_CHTYPE] = GENMASK(6, 0), 70faf0678eSAlex Elder [EV_INTYPE] = BIT(7), 71faf0678eSAlex Elder [EV_EVCHID] = GENMASK(15, 8), 72faf0678eSAlex Elder [EV_EE] = GENMASK(19, 16), 73faf0678eSAlex Elder [EV_CHSTATE] = GENMASK(23, 20), 74faf0678eSAlex Elder [EV_ELEMENT_SIZE] = GENMASK(31, 24), 75faf0678eSAlex Elder }; 76faf0678eSAlex Elder 77faf0678eSAlex Elder REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 78faf0678eSAlex Elder 0x0001c000 + 0x12000 * GSI_EE_AP, 0x80); 79faf0678eSAlex Elder 80faf0678eSAlex Elder static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { 81*1dca26d6SAlex Elder [R_LENGTH] = GENMASK(23, 0), 82faf0678eSAlex Elder }; 83faf0678eSAlex Elder 84faf0678eSAlex Elder REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, 85faf0678eSAlex Elder 0x0001c004 + 0x12000 * GSI_EE_AP, 0x80); 86faf0678eSAlex Elder 87faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 88faf0678eSAlex Elder 0x0001c008 + 0x12000 * GSI_EE_AP, 0x80); 89faf0678eSAlex Elder 90faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3, 91faf0678eSAlex Elder 0x0001c00c + 0x12000 * GSI_EE_AP, 0x80); 92faf0678eSAlex Elder 93faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4, 94faf0678eSAlex Elder 0x0001c010 + 0x12000 * GSI_EE_AP, 0x80); 95faf0678eSAlex Elder 96faf0678eSAlex Elder static const u32 reg_ev_ch_e_cntxt_8_fmask[] = { 97faf0678eSAlex Elder [EV_MODT] = GENMASK(15, 0), 98faf0678eSAlex Elder [EV_MODC] = GENMASK(23, 16), 99faf0678eSAlex Elder [EV_MOD_CNT] = GENMASK(31, 24), 100faf0678eSAlex Elder }; 101faf0678eSAlex Elder 102faf0678eSAlex Elder REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8, 103faf0678eSAlex Elder 0x0001c020 + 0x12000 * GSI_EE_AP, 0x80); 104faf0678eSAlex Elder 105faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9, 106faf0678eSAlex Elder 0x0001c024 + 0x12000 * GSI_EE_AP, 0x80); 107faf0678eSAlex Elder 108faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10, 109faf0678eSAlex Elder 0x0001c028 + 0x12000 * GSI_EE_AP, 0x80); 110faf0678eSAlex Elder 111faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11, 112faf0678eSAlex Elder 0x0001c02c + 0x12000 * GSI_EE_AP, 0x80); 113faf0678eSAlex Elder 114faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12, 115faf0678eSAlex Elder 0x0001c030 + 0x12000 * GSI_EE_AP, 0x80); 116faf0678eSAlex Elder 117faf0678eSAlex Elder REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13, 118faf0678eSAlex Elder 0x0001c034 + 0x12000 * GSI_EE_AP, 0x80); 119faf0678eSAlex Elder 120faf0678eSAlex Elder REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0, 121faf0678eSAlex Elder 0x0001c048 + 0x12000 * GSI_EE_AP, 0x80); 122faf0678eSAlex Elder 123faf0678eSAlex Elder REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, 124faf0678eSAlex Elder 0x0001c04c + 0x12000 * GSI_EE_AP, 0x80); 125faf0678eSAlex Elder 126faf0678eSAlex Elder REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, 127faf0678eSAlex Elder 0x00024000 + 0x12000 * GSI_EE_AP, 0x08); 128faf0678eSAlex Elder 129faf0678eSAlex Elder REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0, 130faf0678eSAlex Elder 0x00024800 + 0x12000 * GSI_EE_AP, 0x08); 131faf0678eSAlex Elder 132faf0678eSAlex Elder static const u32 reg_gsi_status_fmask[] = { 133faf0678eSAlex Elder [ENABLED] = BIT(0), 134faf0678eSAlex Elder /* Bits 1-31 reserved */ 135faf0678eSAlex Elder }; 136faf0678eSAlex Elder 137faf0678eSAlex Elder REG_FIELDS(GSI_STATUS, gsi_status, 0x00025000 + 0x12000 * GSI_EE_AP); 138faf0678eSAlex Elder 139faf0678eSAlex Elder static const u32 reg_ch_cmd_fmask[] = { 140faf0678eSAlex Elder [CH_CHID] = GENMASK(7, 0), 141faf0678eSAlex Elder /* Bits 8-23 reserved */ 142faf0678eSAlex Elder [CH_OPCODE] = GENMASK(31, 24), 143faf0678eSAlex Elder }; 144faf0678eSAlex Elder 145faf0678eSAlex Elder REG_FIELDS(CH_CMD, ch_cmd, 0x00025008 + 0x12000 * GSI_EE_AP); 146faf0678eSAlex Elder 147faf0678eSAlex Elder static const u32 reg_ev_ch_cmd_fmask[] = { 148faf0678eSAlex Elder [EV_CHID] = GENMASK(7, 0), 149faf0678eSAlex Elder /* Bits 8-23 reserved */ 150faf0678eSAlex Elder [EV_OPCODE] = GENMASK(31, 24), 151faf0678eSAlex Elder }; 152faf0678eSAlex Elder 153faf0678eSAlex Elder REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x00025010 + 0x12000 * GSI_EE_AP); 154faf0678eSAlex Elder 155faf0678eSAlex Elder static const u32 reg_generic_cmd_fmask[] = { 156faf0678eSAlex Elder [GENERIC_OPCODE] = GENMASK(4, 0), 157faf0678eSAlex Elder [GENERIC_CHID] = GENMASK(9, 5), 158faf0678eSAlex Elder [GENERIC_EE] = GENMASK(13, 10), 159faf0678eSAlex Elder /* Bits 14-31 reserved */ 160faf0678eSAlex Elder }; 161faf0678eSAlex Elder 162faf0678eSAlex Elder REG_FIELDS(GENERIC_CMD, generic_cmd, 0x00025018 + 0x12000 * GSI_EE_AP); 163faf0678eSAlex Elder 164faf0678eSAlex Elder static const u32 reg_hw_param_2_fmask[] = { 165faf0678eSAlex Elder [NUM_CH_PER_EE] = GENMASK(7, 0), 166faf0678eSAlex Elder [IRAM_SIZE] = GENMASK(12, 8), 167faf0678eSAlex Elder [GSI_CH_PEND_TRANSLATE] = BIT(13), 168faf0678eSAlex Elder [GSI_CH_FULL_LOGIC] = BIT(14), 169faf0678eSAlex Elder [GSI_USE_SDMA] = BIT(15), 170faf0678eSAlex Elder [GSI_SDMA_N_INT] = GENMASK(18, 16), 171faf0678eSAlex Elder [GSI_SDMA_MAX_BURST] = GENMASK(26, 19), 172faf0678eSAlex Elder [GSI_SDMA_N_IOVEC] = GENMASK(29, 27), 173faf0678eSAlex Elder [GSI_USE_RD_WR_ENG] = BIT(30), 174faf0678eSAlex Elder [GSI_USE_INTER_EE] = BIT(31), 175faf0678eSAlex Elder }; 176faf0678eSAlex Elder 177faf0678eSAlex Elder REG_FIELDS(HW_PARAM_2, hw_param_2, 0x00025040 + 0x12000 * GSI_EE_AP); 178faf0678eSAlex Elder 179faf0678eSAlex Elder static const u32 reg_hw_param_4_fmask[] = { 180faf0678eSAlex Elder [EV_PER_EE] = GENMASK(7, 0), 181faf0678eSAlex Elder [IRAM_PROTOCOL_COUNT] = GENMASK(15, 8), 182faf0678eSAlex Elder /* Bits 16-31 reserved */ 183faf0678eSAlex Elder }; 184faf0678eSAlex Elder 185faf0678eSAlex Elder REG_FIELDS(HW_PARAM_4, hw_param_4, 0x00025050 + 0x12000 * GSI_EE_AP); 186faf0678eSAlex Elder 187faf0678eSAlex Elder REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x00025080 + 0x12000 * GSI_EE_AP); 188faf0678eSAlex Elder 189faf0678eSAlex Elder REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x00025088 + 0x12000 * GSI_EE_AP); 190faf0678eSAlex Elder 191faf0678eSAlex Elder REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x00025090 + 0x12000 * GSI_EE_AP); 192faf0678eSAlex Elder 193faf0678eSAlex Elder REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk, 194faf0678eSAlex Elder 0x00025094 + 0x12000 * GSI_EE_AP); 195faf0678eSAlex Elder 196faf0678eSAlex Elder REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr, 197faf0678eSAlex Elder 0x00025098 + 0x12000 * GSI_EE_AP); 198faf0678eSAlex Elder 199faf0678eSAlex Elder REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0002509c + 0x12000 * GSI_EE_AP); 200faf0678eSAlex Elder 201faf0678eSAlex Elder REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk, 202faf0678eSAlex Elder 0x000250a0 + 0x12000 * GSI_EE_AP); 203faf0678eSAlex Elder 204faf0678eSAlex Elder REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr, 205faf0678eSAlex Elder 0x000250a4 + 0x12000 * GSI_EE_AP); 206faf0678eSAlex Elder 207faf0678eSAlex Elder REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x000250a8 + 0x12000 * GSI_EE_AP); 208faf0678eSAlex Elder 209faf0678eSAlex Elder REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk, 210faf0678eSAlex Elder 0x000250ac + 0x12000 * GSI_EE_AP); 211faf0678eSAlex Elder 212faf0678eSAlex Elder REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr, 213faf0678eSAlex Elder 0x000250b0 + 0x12000 * GSI_EE_AP); 214faf0678eSAlex Elder 215faf0678eSAlex Elder REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x00025200 + 0x12000 * GSI_EE_AP); 216faf0678eSAlex Elder 217faf0678eSAlex Elder REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x00025204 + 0x12000 * GSI_EE_AP); 218faf0678eSAlex Elder 219faf0678eSAlex Elder REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x00025208 + 0x12000 * GSI_EE_AP); 220faf0678eSAlex Elder 221faf0678eSAlex Elder REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0002520c + 0x12000 * GSI_EE_AP); 222faf0678eSAlex Elder 223faf0678eSAlex Elder REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x00025210 + 0x12000 * GSI_EE_AP); 224faf0678eSAlex Elder 225faf0678eSAlex Elder REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x00025214 + 0x12000 * GSI_EE_AP); 226faf0678eSAlex Elder 227faf0678eSAlex Elder static const u32 reg_cntxt_intset_fmask[] = { 228faf0678eSAlex Elder [INTYPE] = BIT(0) 229faf0678eSAlex Elder /* Bits 1-31 reserved */ 230faf0678eSAlex Elder }; 231faf0678eSAlex Elder 232faf0678eSAlex Elder REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x00025220 + 0x12000 * GSI_EE_AP); 233faf0678eSAlex Elder 234faf0678eSAlex Elder static const u32 reg_error_log_fmask[] = { 235faf0678eSAlex Elder [ERR_ARG3] = GENMASK(3, 0), 236faf0678eSAlex Elder [ERR_ARG2] = GENMASK(7, 4), 237faf0678eSAlex Elder [ERR_ARG1] = GENMASK(11, 8), 238faf0678eSAlex Elder [ERR_CODE] = GENMASK(15, 12), 239faf0678eSAlex Elder /* Bits 16-18 reserved */ 240faf0678eSAlex Elder [ERR_VIRT_IDX] = GENMASK(23, 19), 241faf0678eSAlex Elder [ERR_TYPE] = GENMASK(27, 24), 242faf0678eSAlex Elder [ERR_EE] = GENMASK(31, 28), 243faf0678eSAlex Elder }; 244faf0678eSAlex Elder 245faf0678eSAlex Elder REG_FIELDS(ERROR_LOG, error_log, 0x00025240 + 0x12000 * GSI_EE_AP); 246faf0678eSAlex Elder 247faf0678eSAlex Elder REG(ERROR_LOG_CLR, error_log_clr, 0x00025244 + 0x12000 * GSI_EE_AP); 248faf0678eSAlex Elder 249faf0678eSAlex Elder static const u32 reg_cntxt_scratch_0_fmask[] = { 250faf0678eSAlex Elder [INTER_EE_RESULT] = GENMASK(2, 0), 251faf0678eSAlex Elder /* Bits 3-4 reserved */ 252faf0678eSAlex Elder [GENERIC_EE_RESULT] = GENMASK(7, 5), 253faf0678eSAlex Elder /* Bits 8-31 reserved */ 254faf0678eSAlex Elder }; 255faf0678eSAlex Elder 256faf0678eSAlex Elder REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x00025400 + 0x12000 * GSI_EE_AP); 257faf0678eSAlex Elder 258faf0678eSAlex Elder static const struct reg *reg_array[] = { 259faf0678eSAlex Elder [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk, 260faf0678eSAlex Elder [INTER_EE_SRC_EV_CH_IRQ_MSK] = ®_inter_ee_src_ev_ch_irq_msk, 261faf0678eSAlex Elder [CH_C_CNTXT_0] = ®_ch_c_cntxt_0, 262faf0678eSAlex Elder [CH_C_CNTXT_1] = ®_ch_c_cntxt_1, 263faf0678eSAlex Elder [CH_C_CNTXT_2] = ®_ch_c_cntxt_2, 264faf0678eSAlex Elder [CH_C_CNTXT_3] = ®_ch_c_cntxt_3, 265faf0678eSAlex Elder [CH_C_QOS] = ®_ch_c_qos, 266faf0678eSAlex Elder [CH_C_SCRATCH_0] = ®_ch_c_scratch_0, 267faf0678eSAlex Elder [CH_C_SCRATCH_1] = ®_ch_c_scratch_1, 268faf0678eSAlex Elder [CH_C_SCRATCH_2] = ®_ch_c_scratch_2, 269faf0678eSAlex Elder [CH_C_SCRATCH_3] = ®_ch_c_scratch_3, 270faf0678eSAlex Elder [EV_CH_E_CNTXT_0] = ®_ev_ch_e_cntxt_0, 271faf0678eSAlex Elder [EV_CH_E_CNTXT_1] = ®_ev_ch_e_cntxt_1, 272faf0678eSAlex Elder [EV_CH_E_CNTXT_2] = ®_ev_ch_e_cntxt_2, 273faf0678eSAlex Elder [EV_CH_E_CNTXT_3] = ®_ev_ch_e_cntxt_3, 274faf0678eSAlex Elder [EV_CH_E_CNTXT_4] = ®_ev_ch_e_cntxt_4, 275faf0678eSAlex Elder [EV_CH_E_CNTXT_8] = ®_ev_ch_e_cntxt_8, 276faf0678eSAlex Elder [EV_CH_E_CNTXT_9] = ®_ev_ch_e_cntxt_9, 277faf0678eSAlex Elder [EV_CH_E_CNTXT_10] = ®_ev_ch_e_cntxt_10, 278faf0678eSAlex Elder [EV_CH_E_CNTXT_11] = ®_ev_ch_e_cntxt_11, 279faf0678eSAlex Elder [EV_CH_E_CNTXT_12] = ®_ev_ch_e_cntxt_12, 280faf0678eSAlex Elder [EV_CH_E_CNTXT_13] = ®_ev_ch_e_cntxt_13, 281faf0678eSAlex Elder [EV_CH_E_SCRATCH_0] = ®_ev_ch_e_scratch_0, 282faf0678eSAlex Elder [EV_CH_E_SCRATCH_1] = ®_ev_ch_e_scratch_1, 283faf0678eSAlex Elder [CH_C_DOORBELL_0] = ®_ch_c_doorbell_0, 284faf0678eSAlex Elder [EV_CH_E_DOORBELL_0] = ®_ev_ch_e_doorbell_0, 285faf0678eSAlex Elder [GSI_STATUS] = ®_gsi_status, 286faf0678eSAlex Elder [CH_CMD] = ®_ch_cmd, 287faf0678eSAlex Elder [EV_CH_CMD] = ®_ev_ch_cmd, 288faf0678eSAlex Elder [GENERIC_CMD] = ®_generic_cmd, 289faf0678eSAlex Elder [HW_PARAM_2] = ®_hw_param_2, 290faf0678eSAlex Elder [HW_PARAM_4] = ®_hw_param_4, 291faf0678eSAlex Elder [CNTXT_TYPE_IRQ] = ®_cntxt_type_irq, 292faf0678eSAlex Elder [CNTXT_TYPE_IRQ_MSK] = ®_cntxt_type_irq_msk, 293faf0678eSAlex Elder [CNTXT_SRC_CH_IRQ] = ®_cntxt_src_ch_irq, 294faf0678eSAlex Elder [CNTXT_SRC_CH_IRQ_MSK] = ®_cntxt_src_ch_irq_msk, 295faf0678eSAlex Elder [CNTXT_SRC_CH_IRQ_CLR] = ®_cntxt_src_ch_irq_clr, 296faf0678eSAlex Elder [CNTXT_SRC_EV_CH_IRQ] = ®_cntxt_src_ev_ch_irq, 297faf0678eSAlex Elder [CNTXT_SRC_EV_CH_IRQ_MSK] = ®_cntxt_src_ev_ch_irq_msk, 298faf0678eSAlex Elder [CNTXT_SRC_EV_CH_IRQ_CLR] = ®_cntxt_src_ev_ch_irq_clr, 299faf0678eSAlex Elder [CNTXT_SRC_IEOB_IRQ] = ®_cntxt_src_ieob_irq, 300faf0678eSAlex Elder [CNTXT_SRC_IEOB_IRQ_MSK] = ®_cntxt_src_ieob_irq_msk, 301faf0678eSAlex Elder [CNTXT_SRC_IEOB_IRQ_CLR] = ®_cntxt_src_ieob_irq_clr, 302faf0678eSAlex Elder [CNTXT_GLOB_IRQ_STTS] = ®_cntxt_glob_irq_stts, 303faf0678eSAlex Elder [CNTXT_GLOB_IRQ_EN] = ®_cntxt_glob_irq_en, 304faf0678eSAlex Elder [CNTXT_GLOB_IRQ_CLR] = ®_cntxt_glob_irq_clr, 305faf0678eSAlex Elder [CNTXT_GSI_IRQ_STTS] = ®_cntxt_gsi_irq_stts, 306faf0678eSAlex Elder [CNTXT_GSI_IRQ_EN] = ®_cntxt_gsi_irq_en, 307faf0678eSAlex Elder [CNTXT_GSI_IRQ_CLR] = ®_cntxt_gsi_irq_clr, 308faf0678eSAlex Elder [CNTXT_INTSET] = ®_cntxt_intset, 309faf0678eSAlex Elder [ERROR_LOG] = ®_error_log, 310faf0678eSAlex Elder [ERROR_LOG_CLR] = ®_error_log_clr, 311faf0678eSAlex Elder [CNTXT_SCRATCH_0] = ®_cntxt_scratch_0, 312faf0678eSAlex Elder }; 313faf0678eSAlex Elder 314faf0678eSAlex Elder const struct regs gsi_regs_v5_0 = { 315faf0678eSAlex Elder .reg_count = ARRAY_SIZE(reg_array), 316faf0678eSAlex Elder .reg = reg_array, 317faf0678eSAlex Elder }; 318