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/openbmc/linux/sound/soc/meson/
H A Daxg-pdm.c15 #define PDM_CTRL 0x00
22 #define PDM_CTRL_CHAN_EN_MASK GENMASK(7, 0)
23 #define PDM_CTRL_CHAN_EN(x) ((x) << 0)
24 #define PDM_HCIC_CTRL1 0x04
32 #define PDM_HCIC_CTRL1_STAGE_NUM_MASK GENMASK(3, 0)
33 #define PDM_HCIC_CTRL1_STAGE_NUM(x) ((x) << 0)
34 #define PDM_HCIC_CTRL2 0x08
35 #define PDM_F1_CTRL 0x0c
40 #define PDM_LPF_STAGE_NUM_MASK GENMASK(8, 0)
41 #define PDM_LPF_STAGE_NUM(x) ((x) << 0)
[all …]
/openbmc/linux/drivers/soc/qcom/
H A Dqcom_gsbi.c17 #define GSBI_CTRL_REG 0x0000
21 #define TCSR_ADM_CRCI_BASE 0x70
30 0x000003, 0x00000c, 0x000030, 0x0000c0,
31 0x000300, 0x000c00, 0x003000, 0x00c000,
32 0x030000, 0x0c0000, 0x300000, 0xc00000
35 0x000003, 0x00000c, 0x000030, 0x0000c0,
36 0x000300, 0x000c00, 0x003000, 0x00c000,
37 0x030000, 0x0c0000, 0x300000, 0xc00000
48 0x001800, 0x006000, 0x000030, 0x0000c0,
49 0x000300, 0x000400, 0x000000, 0x000000,
[all …]
/openbmc/linux/drivers/clk/visconti/
H A Dpll-tmpv770x.c22 VISCONTI_PLL_RATE(840000000, 0x1, 0x0, 0x1, 0x54, 0x000000, 0x2, 0x1),
23 VISCONTI_PLL_RATE(780000000, 0x1, 0x0, 0x1, 0x4e, 0x000000, 0x2, 0x1),
24 VISCONTI_PLL_RATE(600000000, 0x1, 0x0, 0x1, 0x3c, 0x000000, 0x2, 0x1),
29 VISCONTI_PLL_RATE(780000000, 0x1, 0x0, 0x1, 0x4e, 0x000000, 0x2, 0x1),
30 VISCONTI_PLL_RATE(760000000, 0x1, 0x0, 0x1, 0x4c, 0x000000, 0x2, 0x1),
35 VISCONTI_PLL_RATE(165000000, 0x1, 0x0, 0x1, 0x42, 0x000000, 0x4, 0x2),
36 VISCONTI_PLL_RATE(148500000, 0x1, 0x1, 0x1, 0x3b, 0x666666, 0x4, 0x2),
37 VISCONTI_PLL_RATE(96000000, 0x1, 0x0, 0x1, 0x30, 0x000000, 0x5, 0x2),
38 VISCONTI_PLL_RATE(74250000, 0x1, 0x1, 0x1, 0x3b, 0x666666, 0x4, 0x4),
39 VISCONTI_PLL_RATE(54000000, 0x1, 0x0, 0x1, 0x36, 0x000000, 0x5, 0x4),
[all …]
/openbmc/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/openbmc/linux/arch/xtensa/include/asm/
H A Dinitialize_mmu.h34 #define CA_WRITEBACK (0x4)
49 movi a3, 0x25 /* For SMP/MX -- internal for writeback,
53 movi a3, 0x29 /* non-MX -- Most cores use Std Memory
71 movi a1, 0
78 #if CONFIG_KERNEL_LOAD_ADDRESS < 0x40000000ul
79 #define TEMP_MAPPING_VADDR 0x40000000
81 #define TEMP_MAPPING_VADDR 0x00000000
84 /* Step 1: invalidate mapping at 0x40000000..0x5FFFFFFF. */
91 /* Step 2: map 0x40000000..0x47FFFFFF to paddr containing this code
110 * Start at 0x60000000, wrap around, and end with 0x20000000
[all …]
/openbmc/linux/arch/mips/math-emu/
H A Dieee754.c41 DPCNST(0, DP_EMIN - 1, 0x0000000000000ULL), /* + zero */
42 DPCNST(1, DP_EMIN - 1, 0x0000000000000ULL), /* - zero */
43 DPCNST(0, 0, 0x0000000000000ULL), /* + 1.0 */
44 DPCNST(1, 0, 0x0000000000000ULL), /* - 1.0 */
45 DPCNST(0, 3, 0x4000000000000ULL), /* + 10.0 */
46 DPCNST(1, 3, 0x4000000000000ULL), /* - 10.0 */
47 DPCNST(0, DP_EMAX + 1, 0x0000000000000ULL), /* + infinity */
48 DPCNST(1, DP_EMAX + 1, 0x0000000000000ULL), /* - infinity */
49 DPCNST(0, DP_EMAX + 1, 0x7FFFFFFFFFFFFULL), /* + ind legacy qNaN */
50 DPCNST(0, DP_EMAX + 1, 0x8000000000000ULL), /* + indef 2008 qNaN */
[all …]
/openbmc/linux/drivers/video/fbdev/core/
H A Dmodedb.c39 { NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, 0,
43 { NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 0,
47 { NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, 0,
51 { NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, 0,
59 { NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, 0,
63 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, 0,
72 { NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, 0,
76 { NULL, 89, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, 0,
84 { NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, 0,
88 { NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, 0,
[all …]
/openbmc/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/openbmc/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-dai-src.c18 0x0dbae6, 0xff9b0a, 0x0dbae6, 0x05e488, 0xe072b9, 0x000002,
19 0x0dbae6, 0x000f3b, 0x0dbae6, 0x06a537, 0xe17d79, 0x000002,
20 0x0dbae6, 0x01246a, 0x0dbae6, 0x087261, 0xe306be, 0x000002,
21 0x0dbae6, 0x03437d, 0x0dbae6, 0x0bc16f, 0xe57c87, 0x000002,
22 0x0dbae6, 0x072981, 0x0dbae6, 0x111dd3, 0xe94f2a, 0x000002,
23 0x0dbae6, 0x0dc4a6, 0x0dbae6, 0x188611, 0xee85a0, 0x000002,
24 0x0dbae6, 0x168b9a, 0x0dbae6, 0x200e8f, 0xf3ccf1, 0x000002,
25 0x000000, 0x1b75cb, 0x1b75cb, 0x2374a2, 0x000000, 0x000001
29 0x09ae28, 0xf7d97d, 0x09ae28, 0x212a3d, 0xe0ac3a, 0x000002,
30 0x09ae28, 0xf8525a, 0x09ae28, 0x216d72, 0xe234be, 0x000002,
[all …]
/openbmc/linux/drivers/net/can/softing/
H A Dsofting_cs.c30 .manf = 0x0168, .prod = 0x001,
34 .dpram_size = 0x0800,
35 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
36 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
37 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
42 .manf = 0x0168, .prod = 0x002,
46 .dpram_size = 0x0800,
47 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
48 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
49 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
[all …]
/openbmc/u-boot/tools/
H A Dzynqmpimage.h9 * * ug1137 ZynqMP Software Developer Guide v6.0 (Chapter 16)
17 #define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
18 #define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
19 #define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
20 #define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
21 #define HEADER_CPU_SELECT_MASK (0x3 << 10)
22 #define HEADER_CPU_SELECT_R5_SINGLE (0x0 << 10)
23 #define HEADER_CPU_SELECT_A53_32BIT (0x1 << 10)
24 #define HEADER_CPU_SELECT_A53_64BIT (0x2 << 10)
25 #define HEADER_CPU_SELECT_R5_DUAL (0x3 << 10)
[all …]
/openbmc/linux/drivers/scsi/qla2xxx/
H A Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/openbmc/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dg84.c37 const u32 hoff = head * 0x800; in g84_sor_hdmi_infoframe_vsi()
39 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010000); in g84_sor_hdmi_infoframe_vsi()
45 nvkm_wr32(device, 0x616544 + hoff, vsi.header); in g84_sor_hdmi_infoframe_vsi()
46 nvkm_wr32(device, 0x616548 + hoff, vsi.subpack0_low); in g84_sor_hdmi_infoframe_vsi()
47 nvkm_wr32(device, 0x61654c + hoff, vsi.subpack0_high); in g84_sor_hdmi_infoframe_vsi()
49 /* nvkm_wr32(device, 0x616550 + hoff, vsi.subpack1_low); */ in g84_sor_hdmi_infoframe_vsi()
50 /* nvkm_wr32(device, 0x616554 + hoff, vsi.subpack1_high); */ in g84_sor_hdmi_infoframe_vsi()
52 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010001); in g84_sor_hdmi_infoframe_vsi()
60 const u32 hoff = head * 0x800; in g84_sor_hdmi_infoframe_avi()
64 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000); in g84_sor_hdmi_infoframe_avi()
[all …]
H A Dgt200.c33 .mthd = 0x0000,
34 .addr = 0x000000,
36 { 0x0080, 0x000000 },
37 { 0x0084, 0x6109a0 },
38 { 0x0088, 0x6109c0 },
39 { 0x008c, 0x6109c8 },
40 { 0x0090, 0x6109b4 },
41 { 0x0094, 0x610970 },
42 { 0x00a0, 0x610998 },
43 { 0x00a4, 0x610964 },
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-agn-hw.h12 #define IWLAGN_RTC_INST_LOWER_BOUND (0x000000)
13 #define IWLAGN_RTC_INST_UPPER_BOUND (0x020000)
15 #define IWLAGN_RTC_DATA_LOWER_BOUND (0x800000)
16 #define IWLAGN_RTC_DATA_UPPER_BOUND (0x80C000)
23 #define IWL60_RTC_INST_LOWER_BOUND (0x000000)
24 #define IWL60_RTC_INST_UPPER_BOUND (0x040000)
25 #define IWL60_RTC_DATA_LOWER_BOUND (0x800000)
26 #define IWL60_RTC_DATA_UPPER_BOUND (0x814000)
42 #define IWLAGN_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm: 1 milliwatt */
50 #define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */
/openbmc/linux/Documentation/devicetree/bindings/mtd/partitions/
H A Dnvmem-cells.yaml44 reg = <0x1200000 0x0140000>;
50 macaddr_gmac1: macaddr_gmac1@0 {
51 reg = <0x0 0x6>;
55 reg = <0x6 0x6>;
59 reg = <0x1000 0x2f20>;
63 reg = <0x5000 0x2f20>;
72 partition@0 {
74 reg = <0x000000 0x100000>;
81 reg = <0x100000 0xe00000>;
87 reg = <0xf00000 0x100000>;
[all …]
H A Dfixed-partitions.yaml33 "@[0-9a-f]+$":
59 partition@0 {
61 reg = <0x0000000 0x100000>;
66 reg = <0x0100000 0x200000>;
77 partition@0 {
79 reg = <0x00000000 0x1 0x00000000>;
91 partition@0 {
93 reg = <0x0 0x00000000 0x2 0x00000000>;
99 reg = <0x2 0x00000000 0x1 0x00000000>;
109 partition@0 {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl-enetc.txt37 ethernet@0,0 {
39 reg = <0x000000 0 0 0 0>;
45 #size-cells = <0>;
47 reg = <0x2>;
69 ethernet@0,0 {
71 reg = <0x000000 0 0 0 0>;
76 mdio@0,3 {
78 reg = <0x000300 0 0 0 0>;
80 #size-cells = <0>;
82 reg = <0x2>;
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dcs42l42.c49 { CS42L42_FRZ_CTL, 0x00 },
50 { CS42L42_SRC_CTL, 0x10 },
51 { CS42L42_MCLK_CTL, 0x02 },
52 { CS42L42_SFTRAMP_RATE, 0xA4 },
53 { CS42L42_SLOW_START_ENABLE, 0x70 },
54 { CS42L42_I2C_DEBOUNCE, 0x88 },
55 { CS42L42_I2C_STRETCH, 0x03 },
56 { CS42L42_I2C_TIMEOUT, 0xB7 },
57 { CS42L42_PWR_CTL1, 0xFF },
58 { CS42L42_PWR_CTL2, 0x84 },
[all …]
/openbmc/linux/drivers/mtd/devices/
H A Dms02-nv.h16 * 0x000000 - 0x3fffff SRAM
17 * 0x400000 - 0x7fffff CSR
22 * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
23 * 0x000400 - ENDofRAM storage area, available to operating systems
25 * but we can't really use the available area right from 0x000400 as
31 * for the start address of the user-available is 0x001000 which is
32 * nicely page aligned. The area between 0x000404 and 0x000fff may
60 #define MS02NV_CSR 0x400000 /* control & status register */
63 #define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
64 #define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Dvsc7514_regs.c14 [ANA_ADVLEARN_LEARN_MIRROR] = REG_FIELD(ANA_ADVLEARN, 0, 10),
42 [ANA_ANEVENTS_SMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 0, 0),
45 [ANA_TABLES_MACTINDX_M_INDEX] = REG_FIELD(ANA_TABLES_MACTINDX, 0, 9),
50 [QSYS_TIMED_FRAME_ENTRY_TFRM_TM_T] = REG_FIELD(QSYS_TIMED_FRAME_ENTRY, 0, 0),
53 [SYS_RESET_CFG_MEM_INIT] = REG_FIELD(SYS_RESET_CFG, 0, 0),
60 [QSYS_SWITCH_PORT_MODE_TX_PFC_MODE] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 0, 0, 12, 4),
64 [SYS_PORT_MODE_INCL_HDR_ERR] = REG_FIELD_ID(SYS_PORT_MODE, 0, 0, 12, 4),
67 [SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 12, 4),
72 REG(ANA_ADVLEARN, 0x009000),
73 REG(ANA_VLANMASK, 0x009004),
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
/openbmc/u-boot/configs/
H A Dopenrd_ultimate_defconfig4 CONFIG_SYS_TEXT_BASE=0x600000
26 CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb…
H A Dopenrd_base_defconfig4 CONFIG_SYS_TEXT_BASE=0x600000
26 CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb…

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