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/openbmc/linux/arch/arm/mach-davinci/
H A Dda830.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <linux/irqchip/irq-davinci-cp-intc.h>
16 #include <clocksource/timer-davinci.h>
46 MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false)
47 MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false)
48 MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false)
49 MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false)
50 MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false)
51 MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false)
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_ip_engine.c1 // SPDX-License-Identifier: GPL-2.0
14 ((((e2) - (e1) + 1) > 33) && ((e1) < 67))
120 {0x1f, 0xf, 2, 0xf, 0x00680, 32}, /* PATTERN_STATIC_PBS */
121 {0x1f, 0xf, 2, 0xf, 0x00a80, 32}, /* PATTERN_KILLER_DQ0 */
122 {0x1f, 0xf, 2, 0xf, 0x01280, 32}, /* PATTERN_KILLER_DQ1 */
123 {0x1f, 0xf, 2, 0xf, 0x01a80, 32}, /* PATTERN_KILLER_DQ2 */
124 {0x1f, 0xf, 2, 0xf, 0x02280, 32}, /* PATTERN_KILLER_DQ3 */
125 {0x1f, 0xf, 2, 0xf, 0x02a80, 32}, /* PATTERN_KILLER_DQ4 */
126 {0x1f, 0xf, 2, 0xf, 0x03280, 32}, /* PATTERN_KILLER_DQ5 */
127 {0x1f, 0xf, 2, 0xf, 0x03a80, 32}, /* PATTERN_KILLER_DQ6 */
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dfsl_asrc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
14 #include <linux/dma/imx-dma.h>
26 dev_err(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
29 dev_dbg(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
32 dev_warn(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
50 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf,
56 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf,
63 /* 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf */
64 0x0, 0x1, 0x2, 0x7, 0x4, 0x5, 0x6, 0x3, 0x8, 0x9, 0xa, 0xb, 0xc, 0xf, 0xe, 0xd,
[all …]
/openbmc/linux/fs/xfs/scrub/
H A Dxfile.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved.
38 * NOTE: The current shmemfs implementation has a quirk that in-kernel reads
64 struct xfile *xf; in xfile_create() local
65 int error = -ENOMEM; in xfile_create()
67 xf = kmalloc(sizeof(struct xfile), XCHK_GFP_FLAGS); in xfile_create()
68 if (!xf) in xfile_create()
69 return -ENOMEM; in xfile_create()
71 xf->file = shmem_file_setup(description, isize, 0); in xfile_create()
72 if (!xf->file) in xfile_create()
[all …]
H A Dxfile.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved.
17 return xfpage->page != NULL; in xfile_page_cached()
22 return xfpage->page->index; in xfile_page_index()
30 void xfile_destroy(struct xfile *xf);
32 ssize_t xfile_pread(struct xfile *xf, void *buf, size_t count, loff_t pos);
33 ssize_t xfile_pwrite(struct xfile *xf, const void *buf, size_t count,
41 xfile_obj_load(struct xfile *xf, void *buf, size_t count, loff_t pos) in xfile_obj_load() argument
43 ssize_t ret = xfile_pread(xf, buf, count, pos); in xfile_obj_load()
46 return -ENOMEM; in xfile_obj_load()
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8572ds_36b.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8572DS Device Tree Source (36-bit address map)
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
8 /include/ "mpc8572si-pre.dtsi"
19 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
22 0x1 0x0 0xf 0xe0000000 0x08000000
23 0x2 0x0 0xf 0xffa00000 0x00040000
24 0x3 0x0 0xf 0xffdf0000 0x00008000
25 0x4 0x0 0xf 0xffa40000 0x00040000
[all …]
H A Dcyrus_p5020.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
11 /include/ "p5020si-pre.dtsi"
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&mpic>;
24 reserved-memory {
25 #address-cells = <2>;
26 #size-cells = <2>;
29 bman_fbpr: bman-fbpr {
[all …]
H A Dkmcent2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
11 /include/ "t104xsi-pre.dtsi"
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
26 bman_fbpr: bman-fbpr {
30 qman_fqd: qman-fqd {
34 qman_pfdr: qman-pfdr {
41 reg = <0xf 0xfe124000 0 0x2000>;
[all …]
H A Dmpc8536ds_36b.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8536DS Device Tree Source (36-bit address map)
5 * Copyright 2008-2009, 2011 Freescale Semiconductor, Inc.
8 /include/ "mpc8536si-pre.dtsi"
16 #address-cells = <1>;
17 #size-cells = <0>;
22 next-level-cache = <&L2>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0xf 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
[all …]
H A Dt104xrdb.dtsi4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
62 reg = <0xf 0xfe124000 0 0x2000>;
63 ranges = <0 0 0xf 0xe8000000 0x08000000
64 2 0 0xf 0xff800000 0x00010000
[all …]
H A Dt104xd4rdb.dtsi36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
41 bman_fbpr: bman-fbpr {
45 qman_fqd: qman-fqd {
49 qman_pfdr: qman-pfdr {
56 reg = <0xf 0xfe124000 0 0x2000>;
57 ranges = <0 0 0xf 0xe8000000 0x08000000
58 2 0 0xf 0xff800000 0x00010000
59 3 0 0xf 0xffdf0000 0x00008000>;
[all …]
H A Dt208xrdb.dtsi2 * T2080PCIe-RDB Board Device Tree Source
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
[all …]
H A Dkmcoge4.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
11 /include/ "p2041si-pre.dtsi"
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&mpic>;
24 reserved-memory {
25 #address-cells = <2>;
26 #size-cells = <2>;
29 bman_fbpr: bman-fbpr {
33 qman_fqd: qman-fqd {
[all …]
H A Dp1020rdb_36b.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * P1020 RDB Device Tree Source (36-bit address map)
5 * Copyright 2009-2011 Freescale Semiconductor Inc.
8 /include/ "p1020si-pre.dtsi"
18 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
22 0x1 0x0 0xf 0xffa00000 0x00040000
23 0x2 0x0 0xf 0xffb00000 0x00020000>;
27 ranges = <0x0 0xf 0xffe00000 0x100000>;
31 reg = <0xf 0xffe09000 0 0x1000>;
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/gaudi/
H A Dgaudi_masks.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2020 HabanaLabs, Ltd.
15 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
16 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \
17 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0xF)))
20 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
21 (FIELD_PREP(DMA0_QM_GLBL_PROT_CQF_MASK, 0xF)) | \
22 (FIELD_PREP(DMA0_QM_GLBL_PROT_CP_MASK, 0xF)) | \
26 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
30 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7-ddr.h1 /* SPDX-License-Identifier: GPL-2.0+ */
61 #define MSTR_DATA_ACTIVE_RANKS_MASK 0xf << 24
71 #define ADDRMAP2_COL_B2_MASK 0xF << 0
73 #define ADDRMAP2_COL_B3_MASK 0xF << 8
75 #define ADDRMAP2_COL_B4_MASK 0xF << 16
77 #define ADDRMAP2_COL_B5_MASK 0xF << 24
80 #define ADDRMAP3_COL_B6_MASK 0xF << 0
82 #define ADDRMAP3_COL_B7_MASK 0xF << 8
84 #define ADDRMAP3_COL_B8_MASK 0xF << 16
86 #define ADDRMAP3_COL_B9_MASK 0xF << 24
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock.c1 // SPDX-License-Identifier: GPL-2.0+
32 {PERIPH_ID_UART0, 0xf, 0xf, -1, 0, 0, -1},
33 {PERIPH_ID_UART1, 0xf, 0xf, -1, 4, 4, -1},
34 {PERIPH_ID_UART2, 0xf, 0xf, -1, 8, 8, -1},
35 {PERIPH_ID_UART3, 0xf, 0xf, -1, 12, 12, -1},
36 {PERIPH_ID_I2C0, -1, 0x7, 0x7, -1, 24, 0},
37 {PERIPH_ID_I2C1, -1, 0x7, 0x7, -1, 24, 0},
38 {PERIPH_ID_I2C2, -1, 0x7, 0x7, -1, 24, 0},
39 {PERIPH_ID_I2C3, -1, 0x7, 0x7, -1, 24, 0},
40 {PERIPH_ID_I2C4, -1, 0x7, 0x7, -1, 24, 0},
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_aic.c18 #include "hw-ops.h"
42 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci; in ar9003_hw_is_aic_enabled()
46 * HW code and the driver-layer support ready. in ar9003_hw_is_aic_enabled()
50 if (mci_hw->config & ATH_MCI_CONFIG_DISABLE_AIC) in ar9003_hw_is_aic_enabled()
67 for (i = index - 1; i >= 0; i--) { in ar9003_aic_find_valid()
74 i = -1; in ar9003_aic_find_valid()
84 int16_t i = -1; in ar9003_aic_find_index()
87 for (i = ATH_AIC_MAX_AIC_LIN_TABLE - 1; i >= 0; i--) { in ar9003_aic_find_index()
94 i--; in ar9003_aic_find_index()
100 i = -1; in ar9003_aic_find_index()
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Dpsoc_reset_conf_masks.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2020 HabanaLabs, Ltd.
9 ** This is an auto-generated file **
121 #define PSOC_RESET_CONF_SIF_PRSTN_RST_CFG_EN_MASK 0xF
125 #define PSOC_RESET_CONF_SIF_SOFT_RST_CFG_EN_MASK 0xF
129 #define PSOC_RESET_CONF_SIF_FW_RST_CFG_EN_MASK 0xF
133 #define PSOC_RESET_CONF_SIF_WD_RST_CFG_EN_MASK 0xF
137 #define PSOC_RESET_CONF_SIF_MNL_RST_CFG_EN_MASK 0xF
141 #define PSOC_RESET_CONF_SIF_FLR_RST_CFG_EN_MASK 0xF
145 #define PSOC_RESET_CONF_SIF_ECC_DERR_RST_CFG_EN_MASK 0xF
[all …]
/openbmc/linux/arch/sh/boards/mach-sh03/
H A Drtc.c1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/sh/boards/sh03/rtc.c -- CTP/PCI-SH03 on-chip RTC support
48 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10; in sh03_rtc_gettimeofday()
49 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10; in sh03_rtc_gettimeofday()
50 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10; in sh03_rtc_gettimeofday()
51 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10; in sh03_rtc_gettimeofday()
52 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10; in sh03_rtc_gettimeofday()
53 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10 in sh03_rtc_gettimeofday()
54 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100 in sh03_rtc_gettimeofday()
55 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000; in sh03_rtc_gettimeofday()
[all …]
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mt8192-reg.h -- Mediatek 8192 audio driver reg definition
128 #define I2S_OUT_MODE_MASK 0xf
129 #define I2S_OUT_MODE_MASK_SFT (0xf << 8)
172 #define I2S2_OUT_MODE_MASK 0xf
173 #define I2S2_OUT_MODE_MASK_SFT (0xf << 8)
213 #define I2S3_OUT_MODE_MASK 0xf
214 #define I2S3_OUT_MODE_MASK_SFT (0xf << 8)
239 #define I2S4_OUT_MODE_MASK 0xf
240 #define I2S4_OUT_MODE_MASK_SFT (0xf << 8)
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_mpc.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
30 mpc10->mpc_regs->reg
33 mpc10->base.ctx
37 mpc10->mpc_shift->field_name, mpc10->mpc_mask->field_name
48 bottommost_mpcc->blnd_cfg.black_color = *bg_color; in mpc1_set_bg_color()
51 while (bottommost_mpcc->mpcc_bot) { in mpc1_set_bg_color()
53 ASSERT(bottommost_mpcc != bottommost_mpcc->mpcc_bot); in mpc1_set_bg_color()
54 if (bottommost_mpcc == bottommost_mpcc->mpcc_bot) in mpc1_set_bg_color()
57 bottommost_mpcc = bottommost_mpcc->mpcc_bot; in mpc1_set_bg_color()
64 bg_r_cr = bg_color->color_r_cr << 2; in mpc1_set_bg_color()
[all …]
/openbmc/linux/arch/arm/probes/kprobes/
H A Dactions-arm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/probes/kprobes/actions-arm.c
9 * We do not have hardware single-stepping on ARM, This
12 * can't be safely single-stepped in a MP environment, so
57 #include "../decode-arm.h"
72 unsigned long pc = regs->ARM_pc + 4; in emulate_ldrdstrd()
73 int rt = (insn >> 12) & 0xf; in emulate_ldrdstrd()
74 int rn = (insn >> 16) & 0xf; in emulate_ldrdstrd()
75 int rm = insn & 0xf; in emulate_ldrdstrd()
77 register unsigned long rtv asm("r0") = regs->uregs[rt]; in emulate_ldrdstrd()
[all …]
/openbmc/linux/drivers/net/ethernet/amd/
H A Damd8111e.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
56 #define AUTOPOLL0 0x88 /* Auto-poll0 register */
57 #define AUTOPOLL1 0x8A /* Auto-poll1 register */
58 #define AUTOPOLL2 0x8C /* Auto-poll2 register */
59 #define AUTOPOLL3 0x8E /* Auto-poll3 register */
60 #define AUTOPOLL4 0x90 /* Auto-poll4 register */
61 #define AUTOPOLL5 0x92 /* Auto-poll5 register */
63 #define AP_VALUE 0x98 /* Auto-poll value register */
98 #define IFS1 0x18C /* Inter-frame spacing Part1 register */
99 #define IFS 0x18D /* Inter-frame spacing register */
[all …]
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Datmel_mpddrc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
35 u32 lpr; /* 0x1c: Low-power Register */
38 u32 lpddr23_lpr; /* 0x28: LPDDR2-LPDDR3 Low-power Register*/
112 #define ATMEL_MPDDRC_TPR0_TRAS_MASK 0xf
114 #define ATMEL_MPDDRC_TPR0_TRCD_MASK 0xf
116 #define ATMEL_MPDDRC_TPR0_TWR_MASK 0xf
118 #define ATMEL_MPDDRC_TPR0_TRC_MASK 0xf
120 #define ATMEL_MPDDRC_TPR0_TRP_MASK 0xf
122 #define ATMEL_MPDDRC_TPR0_TRRD_MASK 0xf
128 #define ATMEL_MPDDRC_TPR0_TMRD_MASK 0xf
[all …]

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