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/openbmc/u-boot/include/
H A Dipu_pixfmt.h1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
19 (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
29 #define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
31 #define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
32 #define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
33 #define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
34 #define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
35 #define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
36 #define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
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/openbmc/openbmc/poky/meta/recipes-extended/unzip/unzip/
H A D11-cve-2014-8141-getzip64data.patch2 Subject: Fix CVE-2014-8141: out-of-bounds read issues in getZip64Data()
3 Bug-Debian: http://bugs.debian.org/773722
5 The patch comes from unzip_6.0-8+deb7u2.debian.tar.gz
7 Upstream-Status: Backport
8 CVE: CVE-2014-8141
10 Signed-off-by: Roy Li <rongqing.li@windriver.com>
13 --- a/fileio.c
15 @@ -176,6 +176,8 @@
24 @@ -2295,7 +2297,12 @@
25 if (readbuf(__G__ (char *)G.extra_field, length) == 0)
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
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H A Dmetafmt-vsp1-hgo.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgo:
9 Renesas R-Car VSP1 1-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D
20 computes the minimum, maximum and sum of all pixels as well as per-channel
28 - In *64 bins normal mode*, the HGO operates on the three channels independently
29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
32 channels to compute a single 64-bins histogram. Only the RGB image format is
34 - In *256 bins normal mode*, the HGO operates on the Y channel to compute a
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H A Dpixfmt-srggb10p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
24 bytes. Each of the first 4 bytes contain the 8 high order bits
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
38 .. flat-table::
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H A Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
50 Less Than 8 Bits Per Component
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
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/openbmc/linux/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
50 #define GSC_IN_FORMAT_MASK (7 << 8)
51 #define GSC_IN_XRGB8888 (0 << 8)
52 #define GSC_IN_RGB565 (1 << 8)
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/openbmc/linux/drivers/gpu/drm/exynos/
H A Dregs-gsc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* linux/drivers/gpu/drm/exynos/regs-gsc.h
7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
18 #define GSC_ENABLE_CLK_GATE_MODE_MASK (1 << 8)
19 #define GSC_ENABLE_CLK_GATE_MODE_FREE (1 << 8)
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
45 /* G-Scaler input control */
70 #define GSC_IN_FORMAT_MASK (7 << 8)
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/openbmc/linux/Documentation/gpu/
H A Dafbc.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 It provides fine-grained random access and minimizes the amount of
21 AFBC streams can contain several components - where a component
22 corresponds to a color channel (i.e. R, G, B, X, A, Y, Cb, Cr).
32 * Component 1: G
37 reside in the least-significant bits of the corresponding linear
42 * Component 0: R(8)
43 * Component 1: G(8)
44 * Component 2: B(8)
45 * Component 3: A(8)
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/openbmc/linux/arch/arm/crypto/
H A Dcrct10dif-ce-core.S2 // Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions
14 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
62 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
75 .arch armv8-a
76 .fpu crypto-neon-fp-armv8
118 vld1.64 {q11-q12}, [buf]!
125 CPU_LE( vrev64.8 q11, q11 )
126 CPU_LE( vrev64.8 q12, q12 )
130 veor.8 \reg1, \reg1, q8
131 veor.8 \reg2, \reg2, q9
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/openbmc/qemu/hw/display/
H A Dpl110_template.h45 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 7 - (x))) & 1]); in glue()
52 FN_8(8) in glue()
56 FN_8(8) in glue()
61 width -= 32; in glue()
73 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 6 - (x)*2)) & 3]); in glue()
80 FN_4(0, 8) in glue()
84 FN_4(0, 8) in glue()
89 width -= 16; in glue()
101 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 4 - (x)*4)) & 0xf]); in glue()
108 FN_2(0, 8) in glue()
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/openbmc/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
32 /* LARB 0 -- MMSYS */
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/openbmc/linux/tools/perf/util/
H A Dsvghelper.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * svghelper.c - helper functions for outputting svg
62 X = 1.0 * svg_page_width * (__time - first_time) / (last_time - first_time); in time2pixels()
77 while (loop--) { in round_text_size()
102 new_width = (last_time - first_time) / 5000000; in open_svg()
114 fprintf(svgfile, " rect { stroke-width: 1; }\n"); in open_svg()
115 …fprintf(svgfile, " rect.process { fill:rgb(180,180,180); fill-opacity:0.9; stroke-width:1; … in open_svg()
116 …fprintf(svgfile, " rect.process2 { fill:rgb(180,180,180); fill-opacity:0.9; stroke-width:0; … in open_svg()
117 …fprintf(svgfile, " rect.process3 { fill:rgb(180,180,180); fill-opacity:0.5; stroke-width:0; … in open_svg()
118 …fprintf(svgfile, " rect.sample { fill:rgb( 0, 0,255); fill-opacity:0.8; stroke-width:0; … in open_svg()
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/openbmc/linux/arch/x86/crypto/
H A Dpolyval-clmulni_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 * This is an efficient implementation of POLYVAL using intel PCLMULQDQ-NI
7 * instructions. It works on 8 blocks at a time, by precomputing the first 8
8 * keys powers h^8, ..., h^1 in the POLYVAL finite field. This precomputation
12 * than 128. We then compute p(x) = h^8m_0 + ... + h^1m_7 where multiplication
16 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1.
18 * This two step process is equivalent to computing h^8m_0 + ... + h^1m_7 where
20 * two-step process only requires 1 finite field reduction for every 8
28 #define STRIDE_BLOCKS 8
54 * Performs schoolbook1_iteration on two lists of 128-bit polynomials of length
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H A Dsm3-avx-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
22 #define state_h2 8
34 #define K1 -208106958 /* 0xf3988a32 */
35 #define K2 -416213915 /* 0xe7311465 */
36 #define K3 -832427829 /* 0xce6228cb */
37 #define K4 -1664855657 /* 0x9cc45197 */
40 #define K7 -433943364 /* 0xe6228cbc */
41 #define K8 -867886727 /* 0xcc451979 */
42 #define K9 -1735773453 /* 0x988a32f3 */
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H A Dsha512-avx2-asm.S2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
91 g = %r10 define
101 XFER_SIZE = 4*8
102 SRND_SIZE = 1*8
103 INP_SIZE = 1*8
104 INPEND_SIZE = 1*8
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/openbmc/linux/arch/arm64/crypto/
H A Dcrct10dif-ce-core.S2 // Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
14 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
62 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
69 .arch armv8-a+crypto
116 movi perm4.8b, #8
119 ushr perm2.2d, perm1.2d, #8
136 ext t4.8b, ad.8b, ad.8b, #1 // A1
137 ext t5.8b, ad.8b, ad.8b, #2 // A2
138 ext t6.8b, ad.8b, ad.8b, #3 // A3
140 pmull t4.8h, t4.8b, fold_consts.8b // F = A1*B
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H A Dpolyval-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
9 * It works on 8 blocks at a time, by precomputing the first 8 keys powers h^8,
14 * than 128. We then compute p(x) = h^8m_0 + ... + h^1m_7 where multiplication
18 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1.
20 * This two step process is equivalent to computing h^8m_0 + ... + h^1m_7 where
22 * two-step process only requires 1 finite field reduction for every 8
28 #define STRIDE_BLOCKS 8
65 .arch armv8-a+crypto
72 * Computes the product of two 128-bit polynomials in X and Y and XORs the
73 * components of the 256-bit product into LO, MI, HI.
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/openbmc/linux/lib/crypto/
H A Dblake2s-generic.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/uml-utilities/uml-utilities-20040406/
H A D0001-makefiles-Append-to-CFLAGS-instead-of-re-assign.patch3 Date: Tue, 23 May 2023 14:40:31 -0700
4 Subject: [PATCH] makefiles: Append to CFLAGS instead of re-assign
8 Upstream-Status: Inappropriate [No upstream]
9 Signed-off-by: Khem Raj <raj.khem@gmail.com>
10 ---
11 jailtest/Makefile | 2 +-
12 mconsole/Makefile | 2 +-
13 moo/Makefile | 2 +-
14 port-helper/Makefile | 2 +-
15 tunctl/Makefile | 2 +-
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/openbmc/qemu/tcg/
H A Dtcg-op-gvec.c22 #include "tcg/tcg-temp-internal.h"
23 #include "tcg/tcg-op-common.h"
24 #include "tcg/tcg-op-gvec-common.h"
25 #include "tcg/tcg-gvec-desc.h"
43 case 8: in check_size_align()
52 tcg_debug_assert(maxsz <= (8 << SIMD_MAXSZ_BITS)); in check_size_align()
99 * values from the caller will not be detected, e.g. if the in simd_desc()
101 * incorrectly passes us 1 << (SIMD_DATA_BITS - 1). in simd_desc()
106 oprsz = (oprsz / 8) - 1; in simd_desc()
107 maxsz = (maxsz / 8) - 1; in simd_desc()
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/openbmc/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_defs_mfg_comm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
35 BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */
36 BFA_MFG_TYPE_FC8P1 = 815, /*!< 8G 1port FC card */
37 BFA_MFG_TYPE_FC4P2 = 425, /*!< 4G 2port FC card */
38 BFA_MFG_TYPE_FC4P1 = 415, /*!< 4G 1port FC card */
39 BFA_MFG_TYPE_CNA10P2 = 1020, /*!< 10G 2port CNA card */
40 BFA_MFG_TYPE_CNA10P1 = 1010, /*!< 10G 1port CNA card */
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/openbmc/openbmc/meta-raspberrypi/recipes-graphics/raspidmx/raspidmx/
H A D0003-switch-to-pkg-config.patch3 Date: Fri, 4 Dec 2020 01:58:59 -0500
4 Subject: [PATCH] switch to "pkg-config"
8 ERROR: /usr/bin/libpng16-config should not be used, use an alternative such as pkg-config
10 Therefore switch to the more common and more generic "pkg-config" instead of
11 using a libpng-specific tool for flags and libraries.
13 Upstream-Status: Submitted [https://github.com/AndrewFromMelbourne/raspidmx/pull/29]
14 Signed-off-by: Trevor Woerner <twoerner@gmail.com>
15 ---
16 game/Makefile | 4 ++--
17 lib/Makefile | 4 ++--
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/openbmc/linux/arch/x86/math-emu/
H A Dpoly.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*---------------------------------------------------------------------------+
5 | Header file for the FPU-emu poly*.c source files. |
9 | Australia. E-mail billm@melbpc.org.au |
11 | Declarations and definitions for functions operating on Xsig (12-byte |
12 | extended-significand) quantities. |
14 +---------------------------------------------------------------------------*/
19 /* This 12-byte structure is used to improve the accuracy of computation
21 Intended to be used to get results better than 8-byte computation
22 allows. 9-byte would probably be sufficient.
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/openbmc/qemu/include/standard-headers/drm/
H A Ddrm_fourcc.h38 * further describe the buffer's format - for example tiling or compression.
41 * ----------------
55 * vendor-namespaced, and as such the relationship between a fourcc code and a
57 * may preserve meaning - such as number of planes - from the fourcc code,
63 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
75 * - Kernel and user-space drivers: for drivers it's important that modifiers
79 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
92 * -----------------------
97 * upstream in-kernel or open source userspace user does not apply.
104 #define fourcc_code(a, b, c, d) ((uint32_t)(a) | ((uint32_t)(b) << 8) | \
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