152fa7bf9SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2f844a0eaSJeff Kirsher /*
32732ba56SRasesh Mody  * Linux network driver for QLogic BR-series Converged Network Adapter.
4f844a0eaSJeff Kirsher  */
5f844a0eaSJeff Kirsher /*
62732ba56SRasesh Mody  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
72732ba56SRasesh Mody  * Copyright (c) 2014-2015 QLogic Corporation
8f844a0eaSJeff Kirsher  * All rights reserved
92732ba56SRasesh Mody  * www.qlogic.com
10f844a0eaSJeff Kirsher  */
11f844a0eaSJeff Kirsher #ifndef __BFA_DEFS_MFG_COMM_H__
12f844a0eaSJeff Kirsher #define __BFA_DEFS_MFG_COMM_H__
13f844a0eaSJeff Kirsher 
14078086f3SRasesh Mody #include "bfa_defs.h"
15f844a0eaSJeff Kirsher 
161aa8b471SBen Hutchings /* Manufacturing block version */
17078086f3SRasesh Mody #define BFA_MFG_VERSION				3
18f844a0eaSJeff Kirsher #define BFA_MFG_VERSION_UNINIT			0xFF
19f844a0eaSJeff Kirsher 
201aa8b471SBen Hutchings /* Manufacturing block encrypted version */
21f844a0eaSJeff Kirsher #define BFA_MFG_ENC_VER				2
22f844a0eaSJeff Kirsher 
231aa8b471SBen Hutchings /* Manufacturing block version 1 length */
24f844a0eaSJeff Kirsher #define BFA_MFG_VER1_LEN			128
25f844a0eaSJeff Kirsher 
261aa8b471SBen Hutchings /* Manufacturing block header length */
27f844a0eaSJeff Kirsher #define BFA_MFG_HDR_LEN				4
28f844a0eaSJeff Kirsher 
29f844a0eaSJeff Kirsher #define BFA_MFG_SERIALNUM_SIZE			11
30f844a0eaSJeff Kirsher #define STRSZ(_n)				(((_n) + 4) & ~3)
31f844a0eaSJeff Kirsher 
321aa8b471SBen Hutchings /* Manufacturing card type */
33f844a0eaSJeff Kirsher enum {
34f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_CB_MAX  = 825,      /*!< Crossbow card type max	*/
35f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_FC8P2   = 825,      /*!< 8G 2port FC card		*/
36f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_FC8P1   = 815,      /*!< 8G 1port FC card		*/
37f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_FC4P2   = 425,      /*!< 4G 2port FC card		*/
38f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_FC4P1   = 415,      /*!< 4G 1port FC card		*/
39f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_CNA10P2 = 1020,     /*!< 10G 2port CNA card	*/
40f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_CNA10P1 = 1010,     /*!< 10G 1port CNA card	*/
41f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_JAYHAWK = 804,	 /*!< Jayhawk mezz card		*/
42f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_WANCHESE = 1007,	 /*!< Wanchese mezz card	*/
43f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_ASTRA    = 807,	 /*!< Astra mezz card		*/
44f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_LIGHTNING_P0 = 902, /*!< Lightning mezz card - old	*/
45f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_LIGHTNING = 1741,	 /*!< Lightning mezz card	*/
46f391fda1SRasesh Mody 	BFA_MFG_TYPE_PROWLER_F = 1560,	 /*!< Prowler FC only cards	*/
47f391fda1SRasesh Mody 	BFA_MFG_TYPE_PROWLER_N = 1410,	 /*!< Prowler NIC only cards	*/
48f391fda1SRasesh Mody 	BFA_MFG_TYPE_PROWLER_C = 1710,	 /*!< Prowler CNA only cards	*/
49f391fda1SRasesh Mody 	BFA_MFG_TYPE_PROWLER_D = 1860,	 /*!< Prowler Dual cards	*/
50f391fda1SRasesh Mody 	BFA_MFG_TYPE_CHINOOK   = 1867,	 /*!< Chinook cards		*/
51f844a0eaSJeff Kirsher 	BFA_MFG_TYPE_INVALID = 0,	 /*!< Invalid card type		*/
52f844a0eaSJeff Kirsher };
53f844a0eaSJeff Kirsher 
541aa8b471SBen Hutchings /* Check if Mezz card */
55f844a0eaSJeff Kirsher #define bfa_mfg_is_mezz(type) (( \
56f844a0eaSJeff Kirsher 	(type) == BFA_MFG_TYPE_JAYHAWK || \
57f844a0eaSJeff Kirsher 	(type) == BFA_MFG_TYPE_WANCHESE || \
58f844a0eaSJeff Kirsher 	(type) == BFA_MFG_TYPE_ASTRA || \
59f844a0eaSJeff Kirsher 	(type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
60f391fda1SRasesh Mody 	(type) == BFA_MFG_TYPE_LIGHTNING || \
61f391fda1SRasesh Mody 	(type) == BFA_MFG_TYPE_CHINOOK))
62f844a0eaSJeff Kirsher 
63f844a0eaSJeff Kirsher enum {
64f844a0eaSJeff Kirsher 	CB_GPIO_TTV	= (1),		/*!< TTV debug capable cards	*/
65f844a0eaSJeff Kirsher 	CB_GPIO_FC8P2   = (2),		/*!< 8G 2port FC card		*/
66f844a0eaSJeff Kirsher 	CB_GPIO_FC8P1   = (3),		/*!< 8G 1port FC card		*/
67f844a0eaSJeff Kirsher 	CB_GPIO_FC4P2   = (4),		/*!< 4G 2port FC card		*/
68f844a0eaSJeff Kirsher 	CB_GPIO_FC4P1   = (5),		/*!< 4G 1port FC card		*/
69f844a0eaSJeff Kirsher 	CB_GPIO_DFLY    = (6),		/*!< 8G 2port FC mezzanine card	*/
701a50691aSIvan Vecera 	CB_GPIO_PROTO   = BIT(7)	/*!< 8G 2port FC prototypes	*/
71f844a0eaSJeff Kirsher };
72f844a0eaSJeff Kirsher 
73f844a0eaSJeff Kirsher #define bfa_mfg_adapter_prop_init_gpio(gpio, card_type, prop)	\
74f844a0eaSJeff Kirsher do {								\
75f844a0eaSJeff Kirsher 	if ((gpio) & CB_GPIO_PROTO) {				\
76f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_PROTO;			\
77f844a0eaSJeff Kirsher 		(gpio) &= ~CB_GPIO_PROTO;			\
78f844a0eaSJeff Kirsher 	}							\
79ebb56d37SIvan Vecera 	switch (gpio) {						\
80f844a0eaSJeff Kirsher 	case CB_GPIO_TTV:					\
81f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_TTV;			\
82f844a0eaSJeff Kirsher 	case CB_GPIO_DFLY:					\
83f844a0eaSJeff Kirsher 	case CB_GPIO_FC8P2:					\
84f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(NPORTS, 2);		\
85f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(SPEED, 8);		\
86f844a0eaSJeff Kirsher 		(card_type) = BFA_MFG_TYPE_FC8P2;		\
87f844a0eaSJeff Kirsher 		break;						\
88f844a0eaSJeff Kirsher 	case CB_GPIO_FC8P1:					\
89f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(NPORTS, 1);		\
90f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(SPEED, 8);		\
91f844a0eaSJeff Kirsher 		(card_type) = BFA_MFG_TYPE_FC8P1;		\
92f844a0eaSJeff Kirsher 		break;						\
93f844a0eaSJeff Kirsher 	case CB_GPIO_FC4P2:					\
94f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(NPORTS, 2);		\
95f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(SPEED, 4);		\
96f844a0eaSJeff Kirsher 		(card_type) = BFA_MFG_TYPE_FC4P2;		\
97f844a0eaSJeff Kirsher 		break;						\
98f844a0eaSJeff Kirsher 	case CB_GPIO_FC4P1:					\
99f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(NPORTS, 1);		\
100f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_SETP(SPEED, 4);		\
101f844a0eaSJeff Kirsher 		(card_type) = BFA_MFG_TYPE_FC4P1;		\
102f844a0eaSJeff Kirsher 		break;						\
103f844a0eaSJeff Kirsher 	default:						\
104f844a0eaSJeff Kirsher 		(prop) |= BFI_ADAPTER_UNSUPP;			\
105f844a0eaSJeff Kirsher 		(card_type) = BFA_MFG_TYPE_INVALID;		\
106f844a0eaSJeff Kirsher 	}							\
107f844a0eaSJeff Kirsher } while (0)
108f844a0eaSJeff Kirsher 
1091aa8b471SBen Hutchings /* VPD data length */
110f844a0eaSJeff Kirsher #define BFA_MFG_VPD_LEN			512
111f844a0eaSJeff Kirsher #define BFA_MFG_VPD_LEN_INVALID		0
112f844a0eaSJeff Kirsher 
113f844a0eaSJeff Kirsher #define BFA_MFG_VPD_PCI_HDR_OFF		137
114f844a0eaSJeff Kirsher #define BFA_MFG_VPD_PCI_VER_MASK	0x07	/*!< version mask 3 bits */
115f844a0eaSJeff Kirsher #define BFA_MFG_VPD_PCI_VDR_MASK	0xf8	/*!< vendor mask 5 bits */
116f844a0eaSJeff Kirsher 
1171aa8b471SBen Hutchings /* VPD vendor tag */
118f844a0eaSJeff Kirsher enum {
119f844a0eaSJeff Kirsher 	BFA_MFG_VPD_UNKNOWN	= 0,     /*!< vendor unknown		*/
120f844a0eaSJeff Kirsher 	BFA_MFG_VPD_IBM		= 1,     /*!< vendor IBM		*/
121f844a0eaSJeff Kirsher 	BFA_MFG_VPD_HP		= 2,     /*!< vendor HP			*/
122f844a0eaSJeff Kirsher 	BFA_MFG_VPD_DELL	= 3,     /*!< vendor DELL		*/
123f844a0eaSJeff Kirsher 	BFA_MFG_VPD_PCI_IBM	= 0x08,  /*!< PCI VPD IBM		*/
124f844a0eaSJeff Kirsher 	BFA_MFG_VPD_PCI_HP	= 0x10,  /*!< PCI VPD HP		*/
125f844a0eaSJeff Kirsher 	BFA_MFG_VPD_PCI_DELL	= 0x20,  /*!< PCI VPD DELL		*/
126f844a0eaSJeff Kirsher 	BFA_MFG_VPD_PCI_BRCD	= 0xf8,  /*!< PCI VPD Brocade		*/
127f844a0eaSJeff Kirsher };
128f844a0eaSJeff Kirsher 
1291aa8b471SBen Hutchings /* BFA adapter flash vpd data definition.
130f844a0eaSJeff Kirsher  *
131f844a0eaSJeff Kirsher  * All numerical fields are in big-endian format.
132f844a0eaSJeff Kirsher  */
133f844a0eaSJeff Kirsher struct bfa_mfg_vpd {
134f844a0eaSJeff Kirsher 	u8		version;	/*!< vpd data version */
135f844a0eaSJeff Kirsher 	u8		vpd_sig[3];	/*!< characters 'V', 'P', 'D' */
136f844a0eaSJeff Kirsher 	u8		chksum;		/*!< u8 checksum */
137f844a0eaSJeff Kirsher 	u8		vendor;		/*!< vendor */
138f844a0eaSJeff Kirsher 	u8	len;		/*!< vpd data length excluding header */
139f844a0eaSJeff Kirsher 	u8	rsv;
140f844a0eaSJeff Kirsher 	u8		data[BFA_MFG_VPD_LEN];	/*!< vpd data */
141e423c856SIvan Vecera } __packed;
142f844a0eaSJeff Kirsher 
143f844a0eaSJeff Kirsher #endif /* __BFA_DEFS_MFG_H__ */
144