Searched defs:input_clk (Results 1 – 18 of 18) sorted by relevance
31 input_clk: input-clk { label
24 input_clk: input-clk { label
62 input_clk: input-clk { label
60 u32 input_clk = 27e6; /* PDISPLAY.SOR[1].PWM is connected to the crystal */ in nouveau_led_set_brightness() local
205 unsigned long input_clk; member1014 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs()1129 unsigned long input_clk = ndata->new_rate; in cdns_i2c_clk_notifier_cb() local
97 unsigned long input_clk; member
43 unsigned long input_clk; /* master clock (Hz) */ member
161 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs()
37 uint input_clk; /* Input clock to MMC controller */ member
149 uint input_clk; /* Input clock to MMC controller */ member
177 unsigned int baud_rate, packet_size, input_clk; in uart_parameters_setup() local
2686 u32 input_clk = 0; in ov5670_probe() local
52 unsigned int input_clk; member
75 struct clk *input_clk[SI5341_NUM_INPUTS]; member
2965 int32_t input_clk, input_vol, i; in vega20_odn_edit_dpm_table() local
5493 uint32_t input_clk; in smu7_odn_edit_dpm_table() local
5542 uint32_t input_clk; in vega10_odn_edit_dpm_table() local