| /openbmc/linux/drivers/clk/baikal-t1/ |
| H A D | ccu-div.c | 61 unsigned long div) in ccu_div_lock_delay_ns()
71 unsigned long div) in ccu_div_calc_freq()
113 struct ccu_div *div = to_ccu_div(hw); in ccu_div_var_enable() local
142 struct ccu_div *div = to_ccu_div(hw); in ccu_div_gate_enable() local
328 struct ccu_div *div; member
359 struct ccu_div *div = bit->div; in ccu_div_dbgfs_bit_set() local
372 struct ccu_div *div = priv; in ccu_div_dbgfs_var_clkdiv_set() local
400 struct ccu_div *div = bit->div; in ccu_div_dbgfs_bit_get() local
413 struct ccu_div *div = priv; in ccu_div_dbgfs_var_clkdiv_get() local
426 struct ccu_div *div = priv; in ccu_div_dbgfs_fixed_clkdiv_get() local
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | divider.c | 72 unsigned int div) in _get_table_val()
97 unsigned int div, val; in ti_clk_divider_recalc_rate() local
120 unsigned int div) in _is_valid_table_div()
144 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up() local
229 int div; in ti_clk_divider_round_rate() local
239 unsigned int div, value; in ti_clk_divider_set_rate() local
310 struct clk_omap_divider *div) in _register_divider()
384 struct clk_omap_divider *div) in ti_clk_get_div_table()
470 struct clk_omap_divider *div, in ti_clk_divider_populate()
519 struct clk_omap_divider *div; in of_ti_divider_clk_setup() local
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 147 uint8_t div; in rv1108_mac_set_clk() local
172 u32 div; in rv1108_sfc_set_clk() local
191 u32 div, val; in rv1108_saradc_get_clk() local
216 u32 div, val; in rv1108_aclk_vio1_get_clk() local
242 u32 div, val; in rv1108_aclk_vio0_get_clk() local
277 u32 div, val; in rv1108_dclk_vop_get_clk() local
305 u32 div, val; in rv1108_aclk_bus_get_clk() local
333 u32 div, val; in rv1108_aclk_peri_get_clk() local
345 u32 div, val; in rv1108_hclk_peri_get_clk() local
357 u32 div, val; in rv1108_pclk_peri_get_clk() local
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| H A D | clk_rk3128.c | 27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
39 const struct pll_div *div) in rkclk_set_pll()
76 static int pll_para_config(u32 freq_hz, struct pll_div *div) in pll_para_config()
282 uint div, mux; in rockchip_mmc_get_clk() local
348 u32 div, con; in rk3128_peri_get_pclk() local
393 u32 div, val; in rk3128_saradc_get_clk() local
457 u32 div, con, parent; in rk3128_vop_get_rate() local
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| H A D | clk_rk3368.c | 41 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
89 const struct pll_div *div) in rkclk_set_pll()
159 u32 div, con, con_id, rate; in rk3368_mmc_get_clk() local
222 u32 div = DIV_ROUND_UP(parent_rate, rate); in rk3368_mmc_find_best_rate_and_parent() local
254 u32 con_id, mux = 0, div = 0; in rk3368_mmc_set_clk() local
326 u8 div; in rk3368_gmac_set_clk() local
381 u32 div, val; in rk3368_spi_get_clk() local
429 u32 div, val; in rk3368_saradc_get_clk() local
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| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-divider-gate.c | 21 struct clk_divider *div = to_clk_divider(hw); in to_clk_divider_gate() local
29 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate_ro() local
45 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate() local
77 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_set_rate() local
106 struct clk_divider *div = to_clk_divider(hw); in clk_divider_enable() local
129 struct clk_divider *div = to_clk_divider(hw); in clk_divider_disable() local
146 struct clk_divider *div = to_clk_divider(hw); in clk_divider_is_enabled() local
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| H A D | clk-pllv3.c | 115 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate() local
133 u32 val, div; in clk_pllv3_set_rate() local
163 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate() local
174 u32 div; in clk_pllv3_sys_round_rate() local
191 u32 val, div; in clk_pllv3_sys_set_rate() local
220 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_av_recalc_rate() local
235 u32 div; in clk_pllv3_av_round_rate() local
267 u32 val, div; in clk_pllv3_av_set_rate() local
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| /openbmc/linux/drivers/clk/berlin/ |
| H A D | berlin2-div.c | 67 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
85 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_enable() local
104 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_disable() local
121 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_set_parent() local
152 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_get_parent() local
179 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_recalc_rate() local
237 struct berlin2_div *div; in berlin2_div_register() local
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-fixed-factor.c | 83 unsigned long flags, unsigned int mult, unsigned int div, in __clk_hw_register_fixed_factor()
152 unsigned int mult, unsigned int div) in devm_clk_hw_register_fixed_factor_index()
174 unsigned long flags, unsigned int mult, unsigned int div) in devm_clk_hw_register_fixed_factor_parent_hw()
183 unsigned long flags, unsigned int mult, unsigned int div) in clk_hw_register_fixed_factor_parent_hw()
193 unsigned int mult, unsigned int div) in clk_hw_register_fixed_factor()
202 unsigned int mult, unsigned int div) in clk_register_fixed_factor()
240 unsigned int mult, unsigned int div) in devm_clk_hw_register_fixed_factor()
252 u32 div, mult; in _of_fixed_factor_clk_setup() local
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| H A D | clk-divider.c | 106 unsigned int div) in _get_table_val()
117 unsigned int div, unsigned long flags, u8 width) in _get_val()
135 unsigned int div; in divider_recalc_rate() local
163 unsigned int div) in _is_valid_table_div()
223 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up() local
350 int div; in divider_determine_rate() local
365 int div; in divider_ro_determine_rate() local
474 unsigned int div, value; in divider_get_val() local
544 struct clk_divider *div; in __clk_hw_register_divider() local
629 struct clk_divider *div; in clk_unregister_divider() local
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| /openbmc/u-boot/arch/arm/mach-s5pc1xx/ |
| H A D | clock.c | 137 unsigned long div; in s5pc110_get_arm_clk() local
157 unsigned long div; in s5pc100_get_arm_clk() local
180 uint div, d0_bus_ratio; in get_hclk() local
197 uint div, d1_bus_ratio, pclkd1_ratio; in get_pclkd1() local
218 unsigned int div; in get_hclk_sys() local
247 unsigned int div; in get_pclk_sys() local
323 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk()
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| /openbmc/linux/drivers/clk/mxs/ |
| H A D | clk-div.c | 38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
73 struct clk_div *div; in mxs_clk_div() local
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| /openbmc/linux/drivers/clk/qcom/ |
| H A D | clk-regmap-mux-div.c | 23 int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div) in mux_div_set_src_div()
60 u32 *div) in mux_div_get_src_div()
92 unsigned int i, div, max_div; in mux_div_determine_rate() local
129 u32 div, max_div, best_src = 0, best_div = 0; in __mux_div_set_rate_and_parent() local
167 u32 i, div, src = 0; in mux_div_get_parent() local
206 u32 div, src; in mux_div_recalc_rate() local
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| /openbmc/linux/drivers/clk/bcm/ |
| H A D | clk-kona.c | 50 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value()
75 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min()
84 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max()
101 divider(struct bcm_clk_div *div, u64 scaled_div) in divider()
111 scale_rate(struct bcm_clk_div *div, u32 rate) in scale_rate()
584 struct bcm_clk_div *div, struct bcm_clk_trig *trig) in __div_commit()
640 struct bcm_clk_div *div, struct bcm_clk_trig *trig) in div_init()
648 struct bcm_clk_div *div, struct bcm_clk_trig *trig, in divider_write()
686 struct bcm_clk_div *div, struct bcm_clk_div *pre_div, in clk_recalc_rate()
1004 struct bcm_clk_div *div = &bcm_clk->u.peri->div; in kona_peri_clk_round_rate() local
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| H A D | clk-iproc-asiu.c | 22 struct iproc_asiu_div div; member
104 unsigned int div; in iproc_asiu_clk_round_rate() local
124 unsigned int div, div_h, div_l; in iproc_asiu_clk_set_rate() local
176 const struct iproc_asiu_div *div, in iproc_asiu_setup()
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| /openbmc/linux/drivers/gpu/drm/mcde/ |
| H A D | mcde_clk_div.c | 47 int best_div = 1, div; in mcde_clk_div_choose_div() local
77 int div = mcde_clk_div_choose_div(hw, rate, prate, true); in mcde_clk_div_round_rate() local
88 int div; in mcde_clk_div_recalc_rate() local
113 int div = mcde_clk_div_choose_div(hw, rate, &prate, false); in mcde_clk_div_set_rate() local
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| /openbmc/linux/drivers/clk/sunxi/ |
| H A D | clk-sunxi.c | 35 u8 div; in sun4i_get_pll1_factors() local
159 u8 div; in sun8i_a23_get_pll1_factors() local
203 u8 div; in sun4i_get_pll5_factors() local
230 u8 div; in sun6i_a31_get_pll6_factors() local
251 u32 div; in sun5i_a13_get_ahb_factors() local
290 u8 div, calcp, calcm = 1; in sun6i_get_ahb1_factors() local
348 int div; in sun4i_get_apb1_factors() local
386 u8 div, calcm, calcp; in sun7i_a20_get_out_factors() local
890 } div[SUNXI_DIVS_MAX_QTY]; member
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| H A D | clk-sun9i-cpus.c | 36 #define SUN9I_CPUS_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_DIV_MASK) | \ argument
42 #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_PLL4_DIV_MASK) | \ argument
75 u8 div, pre_div = 1; in sun9i_a80_cpus_clk_round() local
157 u8 div, pre_div, parent; in sun9i_a80_cpus_clk_set_rate() local
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| /openbmc/linux/drivers/clk/actions/ |
| H A D | owl-divider.c | 29 struct owl_divider *div = hw_to_owl_divider(hw); in owl_divider_round_rate() local
55 struct owl_divider *div = hw_to_owl_divider(hw); in owl_divider_recalc_rate() local
84 struct owl_divider *div = hw_to_owl_divider(hw); in owl_divider_set_rate() local
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| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-divider.c | 24 int div; in get_div() local
40 int div, mul; in clk_frac_div_recalc_rate() local
65 int div, mul; in clk_frac_div_round_rate() local
84 int div; in clk_frac_div_set_rate() local
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| H A D | clk-tegra20-emc.c | 58 u32 val, div; in emc_recalc_rate() local
76 u32 val, div; in emc_set_parent() local
106 u32 val, div; in emc_set_rate() local
139 u32 val, div; in emc_set_rate_and_parent() local
176 int div; in emc_determine_rate() local
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | clock.c | 41 uint32_t clkctrl, clkseq, div; in mxs_get_pclk() local
73 uint32_t div; in mxs_get_hclk() local
91 uint32_t clkctrl, clkseq, div; in mxs_get_emiclk() local
122 uint32_t clkctrl, clkseq, div; in mxs_get_gpmiclk() local
148 uint32_t div; in mxs_set_ioclk() local
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| /openbmc/linux/drivers/clk/at91/ |
| H A D | clk-sam9x60-pll.c | 50 u8 div; member
337 static void sam9x60_div_pll_set_div(struct sam9x60_pll_core *core, u32 div, in sam9x60_div_pll_set_div()
358 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_set() local
431 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_recalc_rate() local
491 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_set_rate() local
502 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_set_rate_chg() local
530 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_save_context() local
540 struct sam9x60_div *div = to_sam9x60_div(core); in sam9x60_div_pll_restore_context() local
549 struct sam9x60_div *div = notifier_div; in sam9x60_div_pll_notifier_fn() local
704 struct sam9x60_div *div; in sam9x60_clk_register_div_pll() local
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| /openbmc/u-boot/arch/arm/mach-at91/armv7/ |
| H A D | clock.c | 41 unsigned mul, div; in at91_pll_rate() local
194 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div) in at91_enable_periph_generated_clk()
260 u32 regval, clk_source, div; in at91_get_periph_generated_clk() local
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mx25/ |
| H A D | generic.c | 73 ulong div; in imx_get_armclk() local
89 ulong div; in imx_get_ahbclk() local
107 ulong div; in imx_get_perclk() local
119 ulong div = (fref + freq - 1) / freq; in imx_set_perclk() local
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