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Searched defs:clk_div (Results 1 – 17 of 17) sorted by relevance

/openbmc/u-boot/drivers/video/sunxi/
H A Dlcdc.c72 int clk_div, bool for_ext_vga_dac, in lcdc_tcon0_mode_set()
212 int *clk_div, int *clk_double, bool is_composite) in lcdc_pll_set()
H A Dsunxi_lcd.c46 int clk_div, clk_double, ret; in sunxi_lcd_enable() local
H A Dsunxi_display.c651 int clk_div, clk_double, pin; local
680 int *clk_div, int *clk_double,
753 int clk_div, int clk_double)
927 int __maybe_unused clk_div, clk_double; local
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h64 uint clk_div; in clk_get_divisor() local
/openbmc/u-boot/drivers/led/
H A Dled_bcm6358.c119 unsigned int clk_div; in bcm6358_led_probe() local
/openbmc/u-boot/drivers/mmc/
H A Dmeson_gx_mmc.c35 unsigned int clk, clk_src, clk_div; in meson_mmc_config_clock() local
H A Dexynos_dw_mmc.c61 int8_t clk_div; in exynos_dwmci_get_clk() local
H A Djz_mmc.c322 u8 clk_div = 0; in jz_mmc_set_ios() local
/openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-bcm281xx.c23 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
/openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-bcm235xx.c23 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
/openbmc/u-boot/drivers/i2c/
H A Ds3c24x0_i2c.h59 unsigned clk_div; member
H A Dmxc_i2c.c140 u8 clk_div; in i2c_imx_get_clk() local
/openbmc/u-boot/drivers/spi/
H A Drk_spi.c83 uint clk_div = DIV_ROUND_UP(priv->input_rate, speed); in rkspi_set_clk() local
H A Ddesignware_spi.c484 u16 clk_div; in dw_spi_set_speed() local
H A Dti_qspi.c118 uint clk_div; in ti_spi_set_speed() local
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dtegra_i2c.h91 u32 clk_div; /* 6C: I2C_I2C_CLOCK_DIVISOR */ member
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c497 #define I2C_CLK_REG_VALUE(bus, clk_div) \ argument
511 #define I2C_PMUCLK_REG_VALUE(bus, clk_div) \ argument