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Searched defs:REG (Results 1 – 25 of 32) sorted by relevance

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/openbmc/qemu/target/tricore/
H A Dhelper.c153 #define FIELD_GETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \ argument
162 #define FIELD_GETTER(NAME, REG, FIELD) \ argument
168 #define FIELD_SETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \ argument
177 #define FIELD_SETTER(NAME, REG, FIELD) \ argument
/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-adcox.c10 #define REG uint64_t macro
12 #define REG uint32_t macro
H A Dtest-mmx.c128 #define REG(F) \ macro
H A Dtest-avx.c124 #define REG(F) \ macro
/openbmc/qemu/tests/qtest/
H A Dtpm-util.h20 #define TIS_REG(LOCTY, REG) \ argument
/openbmc/qemu/linux-headers/asm-loongarch/
H A Dkvm.h92 #define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT)) argument
93 #define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG) argument
94 #define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG) argument
/openbmc/qemu/target/hexagon/
H A Dmacros.h200 #define fINSERT_BITS(REG, WIDTH, OFFSET, INVAL) \ argument
427 #define fEA_RI(REG, IMM) tcg_gen_addi_tl(EA, REG, IMM) argument
428 #define fEA_RRs(REG, REG2, SCALE) \ argument
434 #define fEA_IRs(IMM, REG, SCALE) \ argument
440 #define fEA_RI(REG, IMM) \ argument
444 #define fEA_RRs(REG, REG2, SCALE) \ argument
448 #define fEA_IRs(IMM, REG, SCALE) \ argument
456 #define fEA_REG(REG) tcg_gen_mov_tl(EA, REG) argument
457 #define fEA_BREVR(REG) gen_helper_fbrev(EA, REG) argument
458 #define fPM_I(REG, IMM) tcg_gen_addi_tl(REG, REG, IMM) argument
[all …]
/openbmc/u-boot/drivers/net/
H A Dmcfmii.c31 #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \ argument
33 #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \ argument
H A Dmpc8xx_fec.c701 #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \ argument
704 #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \ argument
/openbmc/qemu/target/loongarch/
H A Dcpu.h55 #define GET_FP_CAUSE(REG) FIELD_EX32(REG, FCSR0, CAUSE) argument
56 #define SET_FP_CAUSE(REG, V) \ argument
60 #define UPDATE_FP_CAUSE(REG, V) \ argument
65 #define GET_FP_ENABLES(REG) FIELD_EX32(REG, FCSR0, ENABLES) argument
66 #define SET_FP_ENABLES(REG, V) \ argument
71 #define GET_FP_FLAGS(REG) FIELD_EX32(REG, FCSR0, FLAGS) argument
72 #define SET_FP_FLAGS(REG, V) \ argument
77 #define UPDATE_FP_FLAGS(REG, V) \ argument
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dap.h20 #define CLK_FREQUENCY(REF, REG) (((REF) * 2) / (REG + 2)) argument
/openbmc/u-boot/lib/dhry/
H A Ddhry_2.c46 #define REG macro
H A Ddhry_1.c73 #define REG macro
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dcpu.h31 #define CLK_FREQUENCY(REF, REG) (((REF) * 2) / (REG + 2)) argument
H A Dpinmux-common.c95 #define REG(pin) _R(0x3000 + ((pin) * 4)) macro
/openbmc/qemu/tests/tcg/s390x/
H A Dex-relative-long.c27 #define REG 0x1234567887654321 macro
/openbmc/qemu/target/hexagon/mmvec/
H A Dmacros.h70 #define fGETQBITS(REG, WIDTH, MASK, BITNO) \ argument
72 #define fGETQBIT(REG, BITNO) fGETQBITS(REG, 1, 1, BITNO) argument
96 #define fSETQBITS(REG, WIDTH, MASK, BITNO, VAL) \ argument
102 #define fSETQBIT(REG, BITNO, VAL) fSETQBITS(REG, 1, 1, BITNO, VAL) argument
/openbmc/qemu/target/arm/
H A Dcpregs.h648 #define DO_BIT(REG, BITNAME) \ argument
652 #define DO_REV_BIT(REG, BITNAME) \ argument
662 #define DO_TLBINXS_BIT(REG, BITNAME) \ argument
H A Dcpu.h855 #define FIELD_DP64_IDREG(ISAR, REG, FIELD, VALUE) \ argument
863 #define FIELD_DP32_IDREG(ISAR, REG, FIELD, VALUE) \ argument
871 #define FIELD_EX64_IDREG(ISAR, REG, FIELD) \ argument
877 #define FIELD_EX32_IDREG(ISAR, REG, FIELD) \ argument
883 #define FIELD_SEX64_IDREG(ISAR, REG, FIELD) \ argument
889 #define SET_IDREG(ISAR, REG, VALUE) \ argument
895 #define GET_IDREG(ISAR, REG) \ argument
/openbmc/qemu/hw/net/
H A Dnpcm7xx_emc.c59 #define REG(name) case REG_ ## name: return #name; in emc_reg_name() macro
/openbmc/qemu/hw/ipack/
H A Dtpci200.c56 #define IP_N_FROM_REG(REG) ((REG) / 2 - 1) argument
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h18 #define REG(addr) (*(volatile unsigned int *)(addr)) macro
/openbmc/u-boot/drivers/video/
H A Dtda19988.c19 #define REG(page, addr) (((page) << 8) | (addr)) macro
/openbmc/u-boot/include/
H A Dsym53c8xx.h222 #define REG(r) (r) macro
/openbmc/qemu/target/sh4/
H A Dtranslate.c354 #define REG(x) cpu_gregs[(x) ^ ctx->gbank] macro

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