1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
254bdcc9fSTsiChung Liew /*
354bdcc9fSTsiChung Liew * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
454bdcc9fSTsiChung Liew * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
554bdcc9fSTsiChung Liew */
654bdcc9fSTsiChung Liew
754bdcc9fSTsiChung Liew #include <common.h>
854bdcc9fSTsiChung Liew #include <config.h>
954bdcc9fSTsiChung Liew #include <net.h>
1054bdcc9fSTsiChung Liew #include <netdev.h>
1154bdcc9fSTsiChung Liew
1254bdcc9fSTsiChung Liew #ifdef CONFIG_MCF547x_8x
1354bdcc9fSTsiChung Liew #include <asm/fsl_mcdmafec.h>
1454bdcc9fSTsiChung Liew #else
1554bdcc9fSTsiChung Liew #include <asm/fec.h>
1654bdcc9fSTsiChung Liew #endif
1754bdcc9fSTsiChung Liew #include <asm/immap.h>
1854bdcc9fSTsiChung Liew
1954bdcc9fSTsiChung Liew DECLARE_GLOBAL_DATA_PTR;
2054bdcc9fSTsiChung Liew
21e2a53458SMike Frysinger #if defined(CONFIG_CMD_NET)
2254bdcc9fSTsiChung Liew #undef MII_DEBUG
2354bdcc9fSTsiChung Liew #undef ET_DEBUG
2454bdcc9fSTsiChung Liew
2554bdcc9fSTsiChung Liew /*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
2654bdcc9fSTsiChung Liew
2754bdcc9fSTsiChung Liew #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
2854bdcc9fSTsiChung Liew #include <miiphy.h>
2954bdcc9fSTsiChung Liew
3054bdcc9fSTsiChung Liew /* Make MII read/write commands for the FEC. */
3154bdcc9fSTsiChung Liew #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
3254bdcc9fSTsiChung Liew (REG & 0x1f) << 18))
3354bdcc9fSTsiChung Liew #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
3454bdcc9fSTsiChung Liew (REG & 0x1f) << 18) | (VAL & 0xffff))
3554bdcc9fSTsiChung Liew
3654bdcc9fSTsiChung Liew #ifndef CONFIG_SYS_UNSPEC_PHYID
3754bdcc9fSTsiChung Liew # define CONFIG_SYS_UNSPEC_PHYID 0
3854bdcc9fSTsiChung Liew #endif
3954bdcc9fSTsiChung Liew #ifndef CONFIG_SYS_UNSPEC_STRID
4054bdcc9fSTsiChung Liew # define CONFIG_SYS_UNSPEC_STRID 0
4154bdcc9fSTsiChung Liew #endif
4254bdcc9fSTsiChung Liew
4354bdcc9fSTsiChung Liew #ifdef CONFIG_MCF547x_8x
4454bdcc9fSTsiChung Liew typedef struct fec_info_dma FEC_INFO_T;
4554bdcc9fSTsiChung Liew #define FEC_T fecdma_t
4654bdcc9fSTsiChung Liew #else
4754bdcc9fSTsiChung Liew typedef struct fec_info_s FEC_INFO_T;
4854bdcc9fSTsiChung Liew #define FEC_T fec_t
4954bdcc9fSTsiChung Liew #endif
5054bdcc9fSTsiChung Liew
5154bdcc9fSTsiChung Liew typedef struct phy_info_struct {
5254bdcc9fSTsiChung Liew u32 phyid;
5354bdcc9fSTsiChung Liew char *strid;
5454bdcc9fSTsiChung Liew } phy_info_t;
5554bdcc9fSTsiChung Liew
5654bdcc9fSTsiChung Liew phy_info_t phyinfo[] = {
5754bdcc9fSTsiChung Liew {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
5854bdcc9fSTsiChung Liew {0x00406322, "BCM5222"}, /* Broadcom 5222 */
5954bdcc9fSTsiChung Liew {0x02a80150, "Intel82555"}, /* Intel 82555 */
6054bdcc9fSTsiChung Liew {0x0016f870, "LSI80225"}, /* LSI 80225 */
6154bdcc9fSTsiChung Liew {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
6254bdcc9fSTsiChung Liew {0x78100000, "LXT970"}, /* LXT970 */
6354bdcc9fSTsiChung Liew {0x001378e0, "LXT971"}, /* LXT971 and 972 */
6454bdcc9fSTsiChung Liew {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
6554bdcc9fSTsiChung Liew {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
6654bdcc9fSTsiChung Liew {0x20005CE1, "N83640"}, /* National 83640 */
6754bdcc9fSTsiChung Liew {0x20005C90, "N83848"}, /* National 83848 */
6854bdcc9fSTsiChung Liew {0x20005CA2, "N83849"}, /* National 83849 */
6954bdcc9fSTsiChung Liew {0x01814400, "QS6612"}, /* QS6612 */
7054bdcc9fSTsiChung Liew #if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
7154bdcc9fSTsiChung Liew {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
7254bdcc9fSTsiChung Liew #endif
7354bdcc9fSTsiChung Liew {0, 0}
7454bdcc9fSTsiChung Liew };
7554bdcc9fSTsiChung Liew
7654bdcc9fSTsiChung Liew /*
7754bdcc9fSTsiChung Liew * mii_init -- Initialize the MII for MII command without ethernet
7854bdcc9fSTsiChung Liew * This function is a subset of eth_init
7954bdcc9fSTsiChung Liew */
mii_reset(FEC_INFO_T * info)8054bdcc9fSTsiChung Liew void mii_reset(FEC_INFO_T *info)
8154bdcc9fSTsiChung Liew {
8254bdcc9fSTsiChung Liew volatile FEC_T *fecp = (FEC_T *) (info->miibase);
8354bdcc9fSTsiChung Liew int i;
8454bdcc9fSTsiChung Liew
8554bdcc9fSTsiChung Liew fecp->ecr = FEC_ECR_RESET;
8654bdcc9fSTsiChung Liew
8754bdcc9fSTsiChung Liew for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
8854bdcc9fSTsiChung Liew udelay(1);
8954bdcc9fSTsiChung Liew }
9054bdcc9fSTsiChung Liew if (i == FEC_RESET_DELAY)
9154bdcc9fSTsiChung Liew printf("FEC_RESET_DELAY timeout\n");
9254bdcc9fSTsiChung Liew }
9354bdcc9fSTsiChung Liew
9454bdcc9fSTsiChung Liew /* send command to phy using mii, wait for result */
mii_send(uint mii_cmd)9554bdcc9fSTsiChung Liew uint mii_send(uint mii_cmd)
9654bdcc9fSTsiChung Liew {
9754bdcc9fSTsiChung Liew FEC_INFO_T *info;
9854bdcc9fSTsiChung Liew volatile FEC_T *ep;
9954bdcc9fSTsiChung Liew struct eth_device *dev;
10054bdcc9fSTsiChung Liew uint mii_reply;
10154bdcc9fSTsiChung Liew int j = 0;
10254bdcc9fSTsiChung Liew
10354bdcc9fSTsiChung Liew /* retrieve from register structure */
10454bdcc9fSTsiChung Liew dev = eth_get_dev();
10554bdcc9fSTsiChung Liew info = dev->priv;
10654bdcc9fSTsiChung Liew
10754bdcc9fSTsiChung Liew ep = (FEC_T *) info->miibase;
10854bdcc9fSTsiChung Liew
10954bdcc9fSTsiChung Liew ep->mmfr = mii_cmd; /* command to phy */
11054bdcc9fSTsiChung Liew
11154bdcc9fSTsiChung Liew /* wait for mii complete */
11254bdcc9fSTsiChung Liew while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
11354bdcc9fSTsiChung Liew udelay(1);
11454bdcc9fSTsiChung Liew j++;
11554bdcc9fSTsiChung Liew }
11654bdcc9fSTsiChung Liew if (j >= MCFFEC_TOUT_LOOP) {
11754bdcc9fSTsiChung Liew printf("MII not complete\n");
11854bdcc9fSTsiChung Liew return -1;
11954bdcc9fSTsiChung Liew }
12054bdcc9fSTsiChung Liew
12154bdcc9fSTsiChung Liew mii_reply = ep->mmfr; /* result from phy */
12254bdcc9fSTsiChung Liew ep->eir = FEC_EIR_MII; /* clear MII complete */
12354bdcc9fSTsiChung Liew #ifdef ET_DEBUG
12454bdcc9fSTsiChung Liew printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
12554bdcc9fSTsiChung Liew __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
12654bdcc9fSTsiChung Liew #endif
12754bdcc9fSTsiChung Liew
12854bdcc9fSTsiChung Liew return (mii_reply & 0xffff); /* data read from phy */
12954bdcc9fSTsiChung Liew }
13054bdcc9fSTsiChung Liew #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
13154bdcc9fSTsiChung Liew
13254bdcc9fSTsiChung Liew #if defined(CONFIG_SYS_DISCOVER_PHY)
mii_discover_phy(struct eth_device * dev)13354bdcc9fSTsiChung Liew int mii_discover_phy(struct eth_device *dev)
13454bdcc9fSTsiChung Liew {
13554bdcc9fSTsiChung Liew #define MAX_PHY_PASSES 11
13654bdcc9fSTsiChung Liew FEC_INFO_T *info = dev->priv;
13754bdcc9fSTsiChung Liew int phyaddr, pass;
13854bdcc9fSTsiChung Liew uint phyno, phytype;
13954bdcc9fSTsiChung Liew int i, found = 0;
14054bdcc9fSTsiChung Liew
14154bdcc9fSTsiChung Liew if (info->phyname_init)
14254bdcc9fSTsiChung Liew return info->phy_addr;
14354bdcc9fSTsiChung Liew
14454bdcc9fSTsiChung Liew phyaddr = -1; /* didn't find a PHY yet */
14554bdcc9fSTsiChung Liew for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
14654bdcc9fSTsiChung Liew if (pass > 1) {
14754bdcc9fSTsiChung Liew /* PHY may need more time to recover from reset.
14854bdcc9fSTsiChung Liew * The LXT970 needs 50ms typical, no maximum is
14954bdcc9fSTsiChung Liew * specified, so wait 10ms before try again.
15054bdcc9fSTsiChung Liew * With 11 passes this gives it 100ms to wake up.
15154bdcc9fSTsiChung Liew */
15254bdcc9fSTsiChung Liew udelay(10000); /* wait 10ms */
15354bdcc9fSTsiChung Liew }
15454bdcc9fSTsiChung Liew
15554bdcc9fSTsiChung Liew for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
15654bdcc9fSTsiChung Liew
1578ef583a0SMike Frysinger phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
15854bdcc9fSTsiChung Liew #ifdef ET_DEBUG
15954bdcc9fSTsiChung Liew printf("PHY type 0x%x pass %d type\n", phytype, pass);
16054bdcc9fSTsiChung Liew #endif
16133f684d6SWolfgang Wegner if (phytype == 0xffff)
16233f684d6SWolfgang Wegner continue;
16354bdcc9fSTsiChung Liew phyaddr = phyno;
16454bdcc9fSTsiChung Liew phytype <<= 16;
16554bdcc9fSTsiChung Liew phytype |=
1668ef583a0SMike Frysinger mii_send(mk_mii_read(phyno, MII_PHYSID2));
16754bdcc9fSTsiChung Liew
16854bdcc9fSTsiChung Liew #ifdef ET_DEBUG
16954bdcc9fSTsiChung Liew printf("PHY @ 0x%x pass %d\n", phyno, pass);
17054bdcc9fSTsiChung Liew #endif
17154bdcc9fSTsiChung Liew
172a62cd29cSAxel Lin for (i = 0; (i < ARRAY_SIZE(phyinfo))
17333f684d6SWolfgang Wegner && (phyinfo[i].phyid != 0); i++) {
17454bdcc9fSTsiChung Liew if (phyinfo[i].phyid == phytype) {
17554bdcc9fSTsiChung Liew #ifdef ET_DEBUG
17654bdcc9fSTsiChung Liew printf("phyid %x - %s\n",
17754bdcc9fSTsiChung Liew phyinfo[i].phyid,
17854bdcc9fSTsiChung Liew phyinfo[i].strid);
17954bdcc9fSTsiChung Liew #endif
18054bdcc9fSTsiChung Liew strcpy(info->phy_name, phyinfo[i].strid);
18154bdcc9fSTsiChung Liew info->phyname_init = 1;
18254bdcc9fSTsiChung Liew found = 1;
18354bdcc9fSTsiChung Liew break;
18454bdcc9fSTsiChung Liew }
18554bdcc9fSTsiChung Liew }
18654bdcc9fSTsiChung Liew
18754bdcc9fSTsiChung Liew if (!found) {
18854bdcc9fSTsiChung Liew #ifdef ET_DEBUG
18954bdcc9fSTsiChung Liew printf("0x%08x\n", phytype);
19054bdcc9fSTsiChung Liew #endif
19154bdcc9fSTsiChung Liew strcpy(info->phy_name, "unknown");
19254bdcc9fSTsiChung Liew info->phyname_init = 1;
19354bdcc9fSTsiChung Liew break;
19454bdcc9fSTsiChung Liew }
19554bdcc9fSTsiChung Liew }
19654bdcc9fSTsiChung Liew }
19754bdcc9fSTsiChung Liew
19854bdcc9fSTsiChung Liew if (phyaddr < 0)
19954bdcc9fSTsiChung Liew printf("No PHY device found.\n");
20054bdcc9fSTsiChung Liew
20154bdcc9fSTsiChung Liew return phyaddr;
20254bdcc9fSTsiChung Liew }
20354bdcc9fSTsiChung Liew #endif /* CONFIG_SYS_DISCOVER_PHY */
20454bdcc9fSTsiChung Liew
20554bdcc9fSTsiChung Liew void mii_init(void) __attribute__((weak,alias("__mii_init")));
20654bdcc9fSTsiChung Liew
__mii_init(void)20754bdcc9fSTsiChung Liew void __mii_init(void)
20854bdcc9fSTsiChung Liew {
20954bdcc9fSTsiChung Liew FEC_INFO_T *info;
21054bdcc9fSTsiChung Liew volatile FEC_T *fecp;
21154bdcc9fSTsiChung Liew struct eth_device *dev;
21254bdcc9fSTsiChung Liew int miispd = 0, i = 0;
213c4ff77f5SRichard Retanubun u16 status = 0;
214c4ff77f5SRichard Retanubun u16 linkgood = 0;
21554bdcc9fSTsiChung Liew
21654bdcc9fSTsiChung Liew /* retrieve from register structure */
21754bdcc9fSTsiChung Liew dev = eth_get_dev();
21854bdcc9fSTsiChung Liew info = dev->priv;
21954bdcc9fSTsiChung Liew
22054bdcc9fSTsiChung Liew fecp = (FEC_T *) info->miibase;
22154bdcc9fSTsiChung Liew
22254bdcc9fSTsiChung Liew fecpin_setclear(dev, 1);
22354bdcc9fSTsiChung Liew
22454bdcc9fSTsiChung Liew mii_reset(info);
22554bdcc9fSTsiChung Liew
22654bdcc9fSTsiChung Liew /* We use strictly polling mode only */
22754bdcc9fSTsiChung Liew fecp->eimr = 0;
22854bdcc9fSTsiChung Liew
22954bdcc9fSTsiChung Liew /* Clear any pending interrupt */
23054bdcc9fSTsiChung Liew fecp->eir = 0xffffffff;
23154bdcc9fSTsiChung Liew
23254bdcc9fSTsiChung Liew /* Set MII speed */
23354bdcc9fSTsiChung Liew miispd = (gd->bus_clk / 1000000) / 5;
23454bdcc9fSTsiChung Liew fecp->mscr = miispd << 1;
23554bdcc9fSTsiChung Liew
23654bdcc9fSTsiChung Liew info->phy_addr = mii_discover_phy(dev);
23754bdcc9fSTsiChung Liew
23854bdcc9fSTsiChung Liew while (i < MCFFEC_TOUT_LOOP) {
239c4ff77f5SRichard Retanubun status = 0;
24054bdcc9fSTsiChung Liew i++;
241c4ff77f5SRichard Retanubun /* Read PHY control register */
2428ef583a0SMike Frysinger miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
24354bdcc9fSTsiChung Liew
244c4ff77f5SRichard Retanubun /* If phy set to autonegotiate, wait for autonegotiation done,
245c4ff77f5SRichard Retanubun * if phy is not autonegotiating, just wait for link up.
246c4ff77f5SRichard Retanubun */
2478ef583a0SMike Frysinger if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
2488ef583a0SMike Frysinger linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
249c4ff77f5SRichard Retanubun } else {
2508ef583a0SMike Frysinger linkgood = BMSR_LSTATUS;
251c4ff77f5SRichard Retanubun }
252c4ff77f5SRichard Retanubun /* Read PHY status register */
2538ef583a0SMike Frysinger miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
254c4ff77f5SRichard Retanubun if ((status & linkgood) == linkgood)
25554bdcc9fSTsiChung Liew break;
25654bdcc9fSTsiChung Liew
25744578beaSRichard Retanubun udelay(1);
25854bdcc9fSTsiChung Liew }
25954bdcc9fSTsiChung Liew if (i >= MCFFEC_TOUT_LOOP) {
260c4ff77f5SRichard Retanubun printf("Link UP timeout\n");
26154bdcc9fSTsiChung Liew }
26254bdcc9fSTsiChung Liew
263c4ff77f5SRichard Retanubun /* adapt to the duplex and speed settings of the phy */
26454bdcc9fSTsiChung Liew info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
26554bdcc9fSTsiChung Liew info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
26654bdcc9fSTsiChung Liew }
26754bdcc9fSTsiChung Liew
26854bdcc9fSTsiChung Liew /*
26954bdcc9fSTsiChung Liew * Read and write a MII PHY register, routines used by MII Utilities
27054bdcc9fSTsiChung Liew *
27154bdcc9fSTsiChung Liew * FIXME: These routines are expected to return 0 on success, but mii_send
27254bdcc9fSTsiChung Liew * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
27354bdcc9fSTsiChung Liew * no PHY connected...
27454bdcc9fSTsiChung Liew * For now always return 0.
27554bdcc9fSTsiChung Liew * FIXME: These routines only work after calling eth_init() at least once!
27654bdcc9fSTsiChung Liew * Otherwise they hang in mii_send() !!! Sorry!
27754bdcc9fSTsiChung Liew */
27854bdcc9fSTsiChung Liew
mcffec_miiphy_read(struct mii_dev * bus,int addr,int devad,int reg)279dfcc496eSJoe Hershberger int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
28054bdcc9fSTsiChung Liew {
28154bdcc9fSTsiChung Liew short rdreg; /* register working value */
28254bdcc9fSTsiChung Liew
28354bdcc9fSTsiChung Liew #ifdef MII_DEBUG
28454bdcc9fSTsiChung Liew printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
28554bdcc9fSTsiChung Liew #endif
28654bdcc9fSTsiChung Liew rdreg = mii_send(mk_mii_read(addr, reg));
28754bdcc9fSTsiChung Liew
28854bdcc9fSTsiChung Liew #ifdef MII_DEBUG
289dfcc496eSJoe Hershberger printf("0x%04x\n", rdreg);
29054bdcc9fSTsiChung Liew #endif
29154bdcc9fSTsiChung Liew
292dfcc496eSJoe Hershberger return rdreg;
29354bdcc9fSTsiChung Liew }
29454bdcc9fSTsiChung Liew
mcffec_miiphy_write(struct mii_dev * bus,int addr,int devad,int reg,u16 value)295dfcc496eSJoe Hershberger int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
296dfcc496eSJoe Hershberger u16 value)
29754bdcc9fSTsiChung Liew {
29854bdcc9fSTsiChung Liew #ifdef MII_DEBUG
299dfcc496eSJoe Hershberger printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
30054bdcc9fSTsiChung Liew #endif
30154bdcc9fSTsiChung Liew
3022b758cadSMarek Vasut mii_send(mk_mii_write(addr, reg, value));
30354bdcc9fSTsiChung Liew
30454bdcc9fSTsiChung Liew return 0;
30554bdcc9fSTsiChung Liew }
30654bdcc9fSTsiChung Liew
307e2a53458SMike Frysinger #endif /* CONFIG_CMD_NET */
308