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7e40d0a3 |
| 06-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-samsung
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522e0354 |
| 01-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board
Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
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bea3d826 |
| 27-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot Patch queue for efi v2019.01 - 2018-12-27 Three tiny last minute bug fixes: - Fix RTS relocation - A
Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot Patch queue for efi v2019.01 - 2018-12-27 Three tiny last minute bug fixes: - Fix RTS relocation - Avoid read after free - Fix RTS data positioning (affects BBB)
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562a63e8 |
| 21-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell - Fix breakage in helios4: Change U-Boot offset on SPI Flash - Enable CONFIG_BLK for db-88f6820-amc
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5c676780 |
| 21-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga - stratix10 updates
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877ec6eb |
| 19-Dec-2018 |
Ang, Chee Hong <chee.hong.ang@intel.com> |
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC.
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
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a376702f |
| 24-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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0b8f6378 |
| 18-Aug-2018 |
Marek Vasut <marex@denx.de> |
ARM: socfpga: Reorder Arria10 SPL The Arria10 SPL is a complete mess of calls to functions which are called in the wrong context and it is surprise it works at all. This patch tries
ARM: socfpga: Reorder Arria10 SPL The Arria10 SPL is a complete mess of calls to functions which are called in the wrong context and it is surprise it works at all. This patch tries to clean that mess up by shuffling the function calls around and moving the calls into the correct context. Due to the delicate nature of the reordering, this is done in one huge patch. The following changes happen in this patch: - Security policy init and NIC301 happens first in board_init_f() - The clock init happens very early in board_init_f() in SPL only - arch_early_init_r() only registers the FPGA, just like on Gen5 - arch_early_init_r() is never called from any _f() function - Dedicated FPGA pins are inited in board_init_f() as on Gen5 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
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b71d9e8b |
| 20-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
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8297e648 |
| 17-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sh
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719afeb0 |
| 17-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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d6a61da4 |
| 13-Aug-2018 |
Marek Vasut <marex@denx.de> |
ARM: socfpga: Remove adhoc ethernet reset and configuration Remove ad-hoc ethernet syscon registers configuration and reset support. Reset is now handled by the reset framework and the s
ARM: socfpga: Remove adhoc ethernet reset and configuration Remove ad-hoc ethernet syscon registers configuration and reset support. Reset is now handled by the reset framework and the syscon registers are set in the dwmac_socfpga.c driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
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f9edeb32 |
| 15-Apr-2018 |
Marek Vasut <marex@denx.de> |
ARM: socfpga: Zap all the UART handling complexity The UART reset handling is now done via reset framework using the SoCFPGA reset driver. The UART console assignment is done using the
ARM: socfpga: Zap all the UART handling complexity The UART reset handling is now done via reset framework using the SoCFPGA reset driver. The UART console assignment is done using the DM and console framework. Nuke all this comlexity, since it is just duplicating the same functionality, badly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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406fd7e2 |
| 30-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2018-07-25 Highlights this time: - Many small fixes to improve spec compatibility (foun
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2018-07-25 Highlights this time: - Many small fixes to improve spec compatibility (found by SCT) - Almost enough to run with sandbox target - GetTime() improvements - Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
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0e8a8a31 |
| 27-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
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2ae23a28 |
| 26-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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a57d45db |
| 26-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-net
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ff6bef48 |
| 26-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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42f4b83b |
| 12-Jul-2018 |
Marek Vasut <marex@denx.de> |
ARM: socfpga: Init missing security policies on A10 The Arria10 requires proper configuration of the NOC firewall, otherwise the access to certain areas of the LWHPS bridge fails in Linu
ARM: socfpga: Init missing security policies on A10 The Arria10 requires proper configuration of the NOC firewall, otherwise the access to certain areas of the LWHPS bridge fails in Linux. Add the missing setup. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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914bb7ea |
| 13-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga - Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c Signed-off-by: Tom Rini <trini@konsulko.com>
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2e1de5bd |
| 01-Jun-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Add do_bridge_reset for Arria 10 Add do_bridge_reset() function for Arria 10, it is required by misc.c. arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
arm: socfpga: Add do_bridge_reset for Arria 10 Add do_bridge_reset() function for Arria 10, it is required by misc.c. arch/arm/mach-socfpga/built-in.o: In function `do_bridge': arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset' make[1]: *** [u-boot] Error 1 Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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3eceff64 |
| 06-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-samsung
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8ada17dd |
| 30-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi - Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv tree fixing a warning. Signed-off-by: Tom Rini <trin
Merge branch 'master' of git://git.denx.de/u-boot-spi - Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv tree fixing a warning. Signed-off-by: Tom Rini <trini@konsulko.com>
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bea1649c |
| 20-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sh
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56932e84 |
| 20-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
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