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a77d558c |
| 21-Sep-2022 |
Dylan Hung <dylan_hung@aspeedtech.com> |
ram: ast2600: align the RL and WL setting
Use macro to represent the RL and WL setting to ensure the PHY and
controller setting are aligned.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Ch
ram: ast2600: align the RL and WL setting
Use macro to represent the RL and WL setting to ensure the PHY and
controller setting are aligned.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I9151ef465ddb45b96bb0c5d61c01d516a92127c4
show more ...
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Revision tags: v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04 |
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8c3b8509 |
| 10-Apr-2020 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
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| #
589d5c0c |
| 05-Apr-2020 |
Dylan Hung <dylan_hung@aspeedtech.com> |
refactor code: add macro for ECC setup
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Revision tags: v2020.01, v2019.10, v00.02.05 |
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5185c377 |
| 19-Sep-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
Merge branch 'graphics_pri' into aspeed-dev-v2019.04
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| #
956e9a0e |
| 19-Sep-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
revise request priority setting
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Revision tags: v00.02.04, v00.02.03, v00.02.02 |
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367296cd |
| 23-Aug-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
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| #
e2111a73 |
| 23-Aug-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
Merge branch 'feature/ecc_dev' into aspeed-dev-v2019.04
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| #
d6f57adb |
| 22-Aug-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[add] add ECC setting
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Revision tags: v00.02.01 |
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898309af |
| 17-Jul-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
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| #
425867d8 |
| 16-Jul-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
Merge branch 'feature/dram_palladium' into aspeed-dev-v2019.04
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abeb6036 |
| 16-Jul-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] refactor the bitfield defines
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827cd61a |
| 11-Jul-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/aspeed-build' into aspeed-dev-v2019.04
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6667c99a |
| 11-Jul-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[fix] fix the VGA and SDRAM capacity calculation
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Revision tags: v2019.07, v00.02.00 |
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e08cd9d7 |
| 05-Jun-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
# Conflicts:
# configs/evb-ast2600_defconfig
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635b2a54 |
| 04-Jun-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] correct sdrammc register structure
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e3b40f11 |
| 03-Jun-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[fix] correct the SDRAMMC bit offsets
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cd4a75e9 |
| 31-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] revise DDR4 init flow
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7a45b4a0 |
| 30-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] refine ast2600 sdram phy init
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b3c25758 |
| 29-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] add ast2600 sdrammc common init
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63d9b49f |
| 29-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] rename SDRAM_PCR to MCR34 (follow the naming rule in datasheet)
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a3d01e86 |
| 29-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] correct ast2600 sdrammc capacity and update registers
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4665e277 |
| 29-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[new] initial create ast2600 sdram C driver (not enabled yet)
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