armv8: fsl-lsch3: Make CCN-504 related code conditional

LS2080 family has CCN-504 cache coherent interconnet. Other SoCs
in LSCH3 family may have differnt interconnect.

Signed-o

armv8: fsl-lsch3: Make CCN-504 related code conditional

LS2080 family has CCN-504 cache coherent interconnet. Other SoCs
in LSCH3 family may have differnt interconnect.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>

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LS2080ARDB: QSPI boot: Secure Boot image validation

Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It

LS2080ARDB: QSPI boot: Secure Boot image validation

Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It
must be initialized before the PPA.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>

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SECURE_BOOT: Unify memory map for Layerscape based platforms

Unify memory map for Layerscape based platforms. This patch includes
changes in bootscript, bootscript header and PPA header

SECURE_BOOT: Unify memory map for Layerscape based platforms

Unify memory map for Layerscape based platforms. This patch includes
changes in bootscript, bootscript header and PPA header addresses
change as per unified memory map.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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fsl-layerscape: Consolidate registers space defination for CCI-400 bus

CoreLink Cache Coherent Interconnect (CCI) provides full cache
coherency between two clusters of multi-core CPUs an

fsl-layerscape: Consolidate registers space defination for CCI-400 bus

CoreLink Cache Coherent Interconnect (CCI) provides full cache
coherency between two clusters of multi-core CPUs and I/O coherency
for devices and I/O masters.

This patch add new config option SYS_FSL_HAS_CCI400 and moves
existing register space definaton of CCI-400 bus to fsl_immap to be
shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET
in Kconfig.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: revised commit message, squashed patches for armv8 and armv7]
Reviewed-by: York Sun <york.sun@nxp.com>

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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

EFI Fixes for 2017.09:
- Fix GOP w/o display
- Fix LocateHandle
- Fix exit return value truncation
- Fix

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

EFI Fixes for 2017.09:
- Fix GOP w/o display
- Fix LocateHandle
- Fix exit return value truncation
- Fix missing EFIAPI in efi_locate_handle (for x86)

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Merge git://git.denx.de/u-boot-sunxi

Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://www.denx.de/git/u-boot-imx

Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-spi

Merge branch 'master' of git://git.denx.de/u-boot-rockchip

spl: add hierarchical defaults for SPL_LDSCRIPT

With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
w

spl: add hierarchical defaults for SPL_LDSCRIPT

With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
warnings/errors due to the redefinition of the configuration item.

As we don't want to pollute the defconfig files (and values should
usually be identical for entire architectures), the defaults are moved
into Kconfig. Kconfig will always pick the first default that
matches, so please keep these values at the end of each file (to allow
any board-specific Kconfig, which will be included earlier) to
override with an unconditional default setting.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Convert CONFIG_CMD_PCI to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_PCI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gma

Convert CONFIG_CMD_PCI to Kconfig

This converts the following to Kconfig:
CONFIG_CMD_PCI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

armv8/fsl-lsch2: correct the config description of DSPI clock divider

It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@

armv8/fsl-lsch2: correct the config description of DSPI clock divider

It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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Merge git://git.denx.de/u-boot-dm

Convert CONFIG_SCSI to Kconfig

This converts the following to Kconfig:
CONFIG_SCSI

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Merge git://www.denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
include/configs/imx6qdl_icore_rqs.h
include/configs/imx6ul_gea

Merge git://www.denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
include/configs/imx6qdl_icore_rqs.h
include/configs/imx6ul_geam.h
include/configs/imx6ul_isiot.h

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Merge git://git.denx.de/u-boot-usb

Merge git://git.denx.de/u-boot-fdt

Merge git://git.denx.de/u-boot-net

Merge git://git.denx.de/u-boot-fsl-qoriq

Merge git://git.denx.de/u-boot-sunxi

armv8: layerscape: Enabling loading PPA during SPL stage

Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is lo

armv8: layerscape: Enabling loading PPA during SPL stage

Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI is available.

Signed-off-by: York Sun <york.sun@nxp.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot

This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image

armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot

This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A

This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load

armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A

This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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