History log of /openbmc/qemu/target/mips/tcg/ (Results 101 – 125 of 276)
Revision Date Author Comments
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6180cc4029-Jan-2023 Richard Henderson <richard.henderson@linaro.org>

target/mips: Don't use tcg_temp_local_new

Since tcg_temp_new is now identical, use that.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@

target/mips: Don't use tcg_temp_local_new

Since tcg_temp_new is now identical, use that.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

597f9b2d28-Jan-2023 Richard Henderson <richard.henderson@linaro.org>

accel/tcg: Pass max_insn to gen_intermediate_code by pointer

In preparation for returning the number of insns generated
via the same pointer. Adjust only the prototypes so far.

Reviewed-by: Philip

accel/tcg: Pass max_insn to gen_intermediate_code by pointer

In preparation for returning the number of insns generated
via the same pointer. Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

420bf26527-Feb-2023 Anton Johansson <anjo@rev.ng>

target/mips: Replace `tb_pc()` with `tb->pc`

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230227135202.9710-20-anjo@rev.ng>
Sig

target/mips: Replace `tb_pc()` with `tb->pc`

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230227135202.9710-20-anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


/openbmc/qemu/.gitlab-ci.d/base.yml
/openbmc/qemu/.gitlab-ci.d/buildtest-template.yml
/openbmc/qemu/.gitlab-ci.d/buildtest.yml
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a67dfa6602-Feb-2023 Markus Armbruster <armbru@redhat.com>

Drop duplicate #include

Tracked down with the help of scripts/clean-includes.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by

Drop duplicate #include

Tracked down with the help of scripts/clean-includes.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20230202133830.2152150-21-armbru@redhat.com>

show more ...


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883f2c5910-Jan-2023 Philippe Mathieu-Daudé <philmd@linaro.org>

bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx

The 'hwaddr' type is defined in "exec/hwaddr.h" as:

hwaddr is the type of a physical address
(its size can be different from 'target_ulong').

A

bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx

The 'hwaddr' type is defined in "exec/hwaddr.h" as:

hwaddr is the type of a physical address
(its size can be different from 'target_ulong').

All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:

$ fgrep define include/exec/hwaddr.h
#define HWADDR_H
#define HWADDR_BITS 64
#define HWADDR_MAX UINT64_MAX
#define TARGET_FMT_plx "%016" PRIx64
^^^^^^
#define HWADDR_PRId PRId64
#define HWADDR_PRIi PRIi64
#define HWADDR_PRIo PRIo64
#define HWADDR_PRIu PRIu64
#define HWADDR_PRIx PRIx64
#define HWADDR_PRIX PRIX64

Since hwaddr's size can be *different* from target_ulong, it is
very confusing to read one of its format using the 'TARGET_FMT_'
prefix, normally used for the target_long / target_ulong types:

$ fgrep TARGET_FMT_ include/exec/cpu-defs.h
#define TARGET_FMT_lx "%08x"
#define TARGET_FMT_ld "%d"
#define TARGET_FMT_lu "%u"
#define TARGET_FMT_lx "%016" PRIx64
#define TARGET_FMT_ld "%" PRId64
#define TARGET_FMT_lu "%" PRIu64

Apparently this format was missed during commit a8170e5e97
("Rename target_phys_addr_t to hwaddr"), so complete it by
doing a bulk-rename with:

$ sed -i -e s/TARGET_FMT_plx/HWADDR_FMT_plx/g $(git grep -l TARGET_FMT_plx)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110212947.34557-1-philmd@linaro.org>
[thuth: Fix some warnings from checkpatch.pl along the way]
Signed-off-by: Thomas Huth <thuth@redhat.com>

show more ...


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/openbmc/qemu/tests/vm/basevm.py
/openbmc/qemu/tests/vm/freebsd
/openbmc/qemu/tools/virtiofsd/fuse_log.c
/openbmc/qemu/tools/virtiofsd/fuse_log.h
/openbmc/qemu/tools/virtiofsd/passthrough_ll.c
/openbmc/qemu/trace-events
/openbmc/qemu/ui/cocoa.m
/openbmc/qemu/ui/console.c
/openbmc/qemu/ui/input.c
/openbmc/qemu/ui/spice-core.c
/openbmc/qemu/ui/util.c
/openbmc/qemu/ui/vnc.c
/openbmc/qemu/util/async.c
/openbmc/qemu/util/bufferiszero.c
/openbmc/qemu/util/cutils.c
/openbmc/qemu/util/error-report.c
/openbmc/qemu/util/error.c
/openbmc/qemu/util/interval-tree.c
/openbmc/qemu/util/log.c
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/openbmc/qemu/util/meson.build
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/openbmc/qemu/util/qemu-config.c
/openbmc/qemu/util/vfio-helpers.c
66997c4222-Nov-2022 Markus Armbruster <armbru@redhat.com>

cleanup: Tweak and re-run return_directly.cocci

Tweak the semantic patch to drop redundant parenthesis around the
return expression.

Coccinelle drops a comment in hw/rdma/vmw/pvrdma_cmd.c; restored

cleanup: Tweak and re-run return_directly.cocci

Tweak the semantic patch to drop redundant parenthesis around the
return expression.

Coccinelle drops a comment in hw/rdma/vmw/pvrdma_cmd.c; restored
manually.

Coccinelle messes up vmdk_co_create(), not sure why. Change dropped,
will be done manually in the next commit.

Line breaks in target/avr/cpu.h and hw/rdma/vmw/pvrdma_cmd.c tidied up
manually.

Whitespace in tools/virtiofsd/fuse_lowlevel.c tidied up manually.

checkpatch.pl complains "return of an errno should typically be -ve"
two times for hw/9pfs/9p-synth.c. Preexisting, the patch merely makes
it visible to checkpatch.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20221122134917.1217307-2-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>

show more ...


/openbmc/qemu/.gitlab-ci.d/buildtest.yml
/openbmc/qemu/.gitlab-ci.d/cirrus.yml
/openbmc/qemu/.gitlab-ci.d/cirrus/macos-12.vars
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2a2105a202-Nov-2022 Jiaxun Yang <jiaxun.yang@flygoat.com>

target/mips: Don't check COP1X for 64 bit FP mode

Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit

target/mips: Don't check COP1X for 64 bit FP mode

Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

show more ...

4525ea7e01-Nov-2022 Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>

target/mips: Enable LBX/LWX/* instructions for Octeon

This patch changes condition and function name for enabling
indexed load instructions for Octeon vCPUs. Octeons do not
have DSP extension, but i

target/mips: Enable LBX/LWX/* instructions for Octeon

This patch changes condition and function name for enabling
indexed load instructions for Octeon vCPUs. Octeons do not
have DSP extension, but implement LBX-and-others.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

show more ...

0e8b301031-Oct-2022 Jiaxun Yang <jiaxun.yang@flygoat.com>

target/mips: Cast offset field of Octeon BBIT to int16_t

As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigne

target/mips: Cast offset field of Octeon BBIT to int16_t

As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigned. We need to cast it as signed to do address calculation.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

show more ...


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3766855c24-Oct-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Convert to tcg_ops restore_state_to_opc

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


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/openbmc/qemu/tests/tcg/ppc64/Makefile.target
/openbmc/qemu/tests/tcg/ppc64/bcdsub.c
/openbmc/qemu/tests/tcg/ppc64/byte_reverse.c
/openbmc/qemu/tests/tcg/ppc64/mffsce.c
/openbmc/qemu/tests/tcg/ppc64/mtfsf.c
/openbmc/qemu/tests/tcg/ppc64/non_signalling_xscv.c
/openbmc/qemu/tests/tcg/ppc64/signal_save_restore_xer.c
/openbmc/qemu/tests/tcg/ppc64/xxspltw.c
/openbmc/qemu/tests/tcg/ppc64le/Makefile.target
/openbmc/qemu/tests/tcg/s390x/Makefile.target
/openbmc/qemu/tests/tcg/x86_64/Makefile.softmmu-target
/openbmc/qemu/tests/unit/io-channel-helpers.c
/openbmc/qemu/tests/unit/test-bdrv-drain.c
/openbmc/qemu/tests/unit/test-block-iothread.c
/openbmc/qemu/tests/unit/test-blockjob-txn.c
/openbmc/qemu/tests/unit/test-blockjob.c
/openbmc/qemu/tests/unit/test-coroutine.c
/openbmc/qemu/tests/unit/test-image-locking.c
/openbmc/qemu/tests/unit/test-io-channel-command.c
/openbmc/qemu/trace-events
/openbmc/qemu/ui/dbus.h
/openbmc/qemu/ui/gtk-egl.c
/openbmc/qemu/ui/gtk.c
/openbmc/qemu/ui/vnc.c
/openbmc/qemu/util/iov.c
/openbmc/qemu/util/osdep.c
/openbmc/qemu/util/qemu-coroutine-lock.c
/openbmc/qemu/util/qemu-coroutine.c
/openbmc/qemu/util/qemu-thread-win32.c
fbf59aad15-Aug-2022 Richard Henderson <richard.henderson@linaro.org>

accel/tcg: Introduce tb_pc and log_pc

The availability of tb->pc will shortly be conditional.
Introduce accessor functions to minimize ifdefs.

Pass around a known pc to places like tcg_gen_code,
wh

accel/tcg: Introduce tb_pc and log_pc

The availability of tb->pc will shortly be conditional.
Introduce accessor functions to minimize ifdefs.

Pass around a known pc to places like tcg_gen_code,
where the caller must already have the value.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


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/openbmc/qemu/tests/docker/dockerfiles/debian-mips-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-mips64-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-powerpc-test-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-riscv64-test-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-sh4-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-sparc64-cross.docker
/openbmc/qemu/tests/docker/dockerfiles/debian-toolchain.docker
/openbmc/qemu/tests/docker/dockerfiles/opensuse-leap.docker
/openbmc/qemu/tests/docker/dockerfiles/ubuntu2004.docker
/openbmc/qemu/tests/lcitool/libvirt-ci
/openbmc/qemu/tests/lcitool/refresh
/openbmc/qemu/tests/qemu-iotests/172.out
/openbmc/qemu/tests/qemu-iotests/227.out
/openbmc/qemu/tests/qemu-iotests/tests/backing-file-invalidation
/openbmc/qemu/tests/qemu-iotests/tests/backing-file-invalidation.out
/openbmc/qemu/tests/qtest/ahci-test.c
/openbmc/qemu/tests/qtest/aspeed_smc-test.c
/openbmc/qemu/tests/qtest/bios-tables-test.c
/openbmc/qemu/tests/qtest/boot-serial-test.c
/openbmc/qemu/tests/qtest/cxl-test.c
/openbmc/qemu/tests/qtest/device-plug-test.c
/openbmc/qemu/tests/qtest/e1000-test.c
/openbmc/qemu/tests/qtest/es1370-test.c
/openbmc/qemu/tests/qtest/fdc-test.c
/openbmc/qemu/tests/qtest/fuzz-lsi53c895a-test.c
/openbmc/qemu/tests/qtest/fuzz-sb16-test.c
/openbmc/qemu/tests/qtest/fuzz/fuzz.c
/openbmc/qemu/tests/qtest/fuzz/generic_fuzz_configs.h
/openbmc/qemu/tests/qtest/fuzz/virtio_blk_fuzz.c
/openbmc/qemu/tests/qtest/hd-geo-test.c
/openbmc/qemu/tests/qtest/i440fx-test.c
/openbmc/qemu/tests/qtest/ide-test.c
/openbmc/qemu/tests/qtest/intel-hda-test.c
/openbmc/qemu/tests/qtest/libqtest-single.h
/openbmc/qemu/tests/qtest/libqtest.c
/openbmc/qemu/tests/qtest/libqtest.h
/openbmc/qemu/tests/qtest/meson.build
/openbmc/qemu/tests/qtest/microbit-test.c
/openbmc/qemu/tests/qtest/migration-test.c
/openbmc/qemu/tests/qtest/npcm7xx_emc-test.c
/openbmc/qemu/tests/qtest/pflash-cfi02-test.c
/openbmc/qemu/tests/qtest/qmp-test.c
/openbmc/qemu/tests/qtest/vhost-user-blk-test.c
/openbmc/qemu/tests/qtest/vhost-user-test.c
/openbmc/qemu/tests/qtest/virtio-blk-test.c
/openbmc/qemu/tests/qtest/virtio-net-failover.c
/openbmc/qemu/tests/qtest/virtio-net-test.c
/openbmc/qemu/tests/qtest/virtio-scsi-test.c
/openbmc/qemu/tests/tcg/hexagon/usr.c
/openbmc/qemu/tests/tcg/i386/Makefile.target
/openbmc/qemu/tests/tcg/i386/test-3dnow.c
/openbmc/qemu/tests/tcg/i386/test-avx.py
/openbmc/qemu/tests/tcg/i386/test-i386.c
/openbmc/qemu/tests/tcg/i386/test-mmx.c
/openbmc/qemu/tests/tcg/i386/test-mmx.py
/openbmc/qemu/tests/tcg/i386/x86.csv
/openbmc/qemu/tests/tcg/multiarch/linux/linux-madvise.c
/openbmc/qemu/tests/tcg/x86_64/Makefile.target
/openbmc/qemu/tests/unit/check-block-qdict.c
/openbmc/qemu/tests/unit/test-image-locking.c
/openbmc/qemu/tests/unit/test-io-channel-command.c
/openbmc/qemu/tests/unit/test-qga.c
/openbmc/qemu/tests/unit/test-visitor-serialization.c
/openbmc/qemu/tests/unit/test-vmstate.c
/openbmc/qemu/tests/vhost-user-bridge.c
/openbmc/qemu/tests/vm/Makefile.include
/openbmc/qemu/tests/vm/netbsd
/openbmc/qemu/tools/virtiofsd/passthrough_ll.c
/openbmc/qemu/trace/control-target.c
/openbmc/qemu/ui/clipboard.c
/openbmc/qemu/ui/cocoa.m
/openbmc/qemu/ui/console.c
/openbmc/qemu/ui/curses.c
/openbmc/qemu/ui/trace-events
/openbmc/qemu/ui/vdagent.c
/openbmc/qemu/util/oslib-posix.c
/openbmc/qemu/util/qemu-config.c
b35d740122-Aug-2022 Peter Maydell <peter.maydell@linaro.org>

target/mips: Honour -semihosting-config userspace=on

Honour the commandline -semihosting-config userspace=on option,
instead of always permitting userspace semihosting calls in system
emulation mode

target/mips: Honour -semihosting-config userspace=on

Honour the commandline -semihosting-config userspace=on option,
instead of always permitting userspace semihosting calls in system
emulation mode, by passing the correct value to the is_userspace
argument of semihosting_enabled().

Note that this is a behaviour change: if the user wants to
do semihosting calls from userspace they must now specifically
enable them on the command line.

MIPS semihosting is not implemented for linux-user builds.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220822141230.3658237-5-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


/openbmc/qemu/accel/tcg/translate-all.c
/openbmc/qemu/accel/tcg/translator.c
/openbmc/qemu/disas/riscv.c
/openbmc/qemu/docs/about/build-platforms.rst
/openbmc/qemu/docs/system/devices/usb.rst
/openbmc/qemu/hw/core/sysbus-fdt.c
/openbmc/qemu/hw/intc/riscv_aclint.c
/openbmc/qemu/hw/intc/riscv_imsic.c
/openbmc/qemu/hw/riscv/boot.c
/openbmc/qemu/hw/riscv/microchip_pfsoc.c
/openbmc/qemu/hw/riscv/opentitan.c
/openbmc/qemu/hw/riscv/shakti_c.c
/openbmc/qemu/hw/riscv/spike.c
/openbmc/qemu/hw/riscv/virt.c
/openbmc/qemu/hw/timer/ibex_timer.c
/openbmc/qemu/include/exec/translator.h
/openbmc/qemu/include/hw/intc/riscv_aclint.h
/openbmc/qemu/include/hw/riscv/boot.h
/openbmc/qemu/include/hw/riscv/microchip_pfsoc.h
/openbmc/qemu/include/hw/riscv/opentitan.h
/openbmc/qemu/include/hw/riscv/virt.h
/openbmc/qemu/include/hw/timer/ibex_timer.h
/openbmc/qemu/include/semihosting/semihost.h
/openbmc/qemu/pc-bios/opensbi-riscv32-generic-fw_dynamic.bin
/openbmc/qemu/pc-bios/opensbi-riscv64-generic-fw_dynamic.bin
/openbmc/qemu/qapi/block-core.json
/openbmc/qemu/qapi/dump.json
/openbmc/qemu/qapi/machine.json
/openbmc/qemu/qapi/migration.json
/openbmc/qemu/qapi/net.json
/openbmc/qemu/qapi/qdev.json
/openbmc/qemu/qapi/ui.json
/openbmc/qemu/qemu-options.hx
/openbmc/qemu/roms/opensbi
/openbmc/qemu/semihosting/config.c
/openbmc/qemu/softmmu/vl.c
/openbmc/qemu/stubs/semihost.c
/openbmc/qemu/target/arm/translate-a64.c
/openbmc/qemu/target/arm/translate.c
/openbmc/qemu/target/i386/tcg/translate.c
/openbmc/qemu/target/m68k/m68k-semi.c
/openbmc/qemu/target/m68k/op_helper.c
micromips_translate.c.inc
mips16e_translate.c.inc
nanomips_translate.c.inc
translate.c
/openbmc/qemu/target/nios2/nios2-semi.c
/openbmc/qemu/target/nios2/translate.c
/openbmc/qemu/target/riscv/cpu.c
/openbmc/qemu/target/riscv/cpu.h
/openbmc/qemu/target/riscv/cpu_bits.h
/openbmc/qemu/target/riscv/cpu_helper.c
/openbmc/qemu/target/riscv/csr.c
/openbmc/qemu/target/riscv/insn16.decode
/openbmc/qemu/target/riscv/insn32.decode
/openbmc/qemu/target/riscv/insn_trans/trans_rvi.c.inc
/openbmc/qemu/target/riscv/insn_trans/trans_rvv.c.inc
/openbmc/qemu/target/riscv/instmap.h
/openbmc/qemu/target/riscv/internals.h
/openbmc/qemu/target/riscv/machine.c
/openbmc/qemu/target/riscv/meson.build
/openbmc/qemu/target/riscv/pmu.c
/openbmc/qemu/target/riscv/pmu.h
/openbmc/qemu/target/riscv/time_helper.c
/openbmc/qemu/target/riscv/time_helper.h
/openbmc/qemu/target/riscv/translate.c
/openbmc/qemu/target/riscv/vector_helper.c
/openbmc/qemu/target/s390x/tcg/translate.c
/openbmc/qemu/target/xtensa/translate.c
/openbmc/qemu/tests/tcg/multiarch/noexec.c.inc
/openbmc/qemu/tests/tcg/riscv64/Makefile.target
/openbmc/qemu/tests/tcg/riscv64/noexec.c
/openbmc/qemu/tests/tcg/s390x/Makefile.target
/openbmc/qemu/tests/tcg/s390x/noexec.c
/openbmc/qemu/tests/tcg/x86_64/Makefile.target
/openbmc/qemu/tests/tcg/x86_64/noexec.c
306c872111-Aug-2022 Richard Henderson <richard.henderson@linaro.org>

accel/tcg: Add pc and host_pc params to gen_intermediate_code

Pass these along to translator_loop -- pc may be used instead
of tb->pc, and host_pc is currently unused. Adjust all targets
at one tim

accel/tcg: Add pc and host_pc params to gen_intermediate_code

Pass these along to translator_loop -- pc may be used instead
of tb->pc, and host_pc is currently unused. Adjust all targets
at one time.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


/openbmc/qemu/.gitlab-ci.d/windows.yml
/openbmc/qemu/MAINTAINERS
/openbmc/qemu/VERSION
/openbmc/qemu/accel/kvm/kvm-all.c
/openbmc/qemu/accel/tcg/cpu-exec.c
/openbmc/qemu/accel/tcg/cputlb.c
/openbmc/qemu/accel/tcg/tcg-accel-ops-icount.c
/openbmc/qemu/accel/tcg/translate-all.c
/openbmc/qemu/accel/tcg/translator.c
/openbmc/qemu/accel/tcg/user-exec.c
/openbmc/qemu/audio/audio.c
/openbmc/qemu/audio/audio.h
/openbmc/qemu/backends/dbus-vmstate.c
/openbmc/qemu/backends/hostmem.c
/openbmc/qemu/backends/tpm/tpm_ioctl.h
/openbmc/qemu/chardev/char-socket.c
/openbmc/qemu/configs/devices/or1k-softmmu/default.mak
/openbmc/qemu/configs/targets/or1k-softmmu.mak
/openbmc/qemu/configure
/openbmc/qemu/contrib/vhost-user-blk/vhost-user-blk.c
/openbmc/qemu/docs/about/deprecated.rst
/openbmc/qemu/docs/about/removed-features.rst
/openbmc/qemu/docs/devel/build-system.rst
/openbmc/qemu/docs/devel/testing.rst
/openbmc/qemu/docs/specs/acpi_erst.rst
/openbmc/qemu/docs/system/devices/canokey.rst
/openbmc/qemu/docs/system/devices/cxl.rst
/openbmc/qemu/docs/system/loongarch/loongson3.rst
/openbmc/qemu/docs/system/openrisc/cpu-features.rst
/openbmc/qemu/docs/system/openrisc/emulation.rst
/openbmc/qemu/docs/system/openrisc/or1k-sim.rst
/openbmc/qemu/docs/system/openrisc/virt.rst
/openbmc/qemu/docs/system/ppc/embedded.rst
/openbmc/qemu/docs/system/ppc/pseries.rst
/openbmc/qemu/docs/system/target-openrisc.rst
/openbmc/qemu/docs/system/targets.rst
/openbmc/qemu/fpu/softfloat-parts.c.inc
/openbmc/qemu/fpu/softfloat.c
/openbmc/qemu/hw/arm/virt-acpi-build.c
/openbmc/qemu/hw/arm/virt.c
/openbmc/qemu/hw/block/dataplane/virtio-blk.c
/openbmc/qemu/hw/core/machine.c
/openbmc/qemu/hw/cxl/cxl-device-utils.c
/openbmc/qemu/hw/cxl/cxl-host.c
/openbmc/qemu/hw/cxl/cxl-mailbox-utils.c
/openbmc/qemu/hw/display/xlnx_dp.c
/openbmc/qemu/hw/i386/intel_iommu.c
/openbmc/qemu/hw/i386/microvm.c
/openbmc/qemu/hw/i386/pc.c
/openbmc/qemu/hw/i386/pc_piix.c
/openbmc/qemu/hw/i386/pc_q35.c
/openbmc/qemu/hw/intc/ppc-uic.c
/openbmc/qemu/hw/m68k/virt.c
/openbmc/qemu/hw/mips/malta.c
/openbmc/qemu/hw/misc/grlib_ahb_apb_pnp.c
/openbmc/qemu/hw/misc/trace-events
/openbmc/qemu/hw/net/rocker/rocker.c
/openbmc/qemu/hw/net/tulip.c
/openbmc/qemu/hw/net/vhost_net.c
/openbmc/qemu/hw/openrisc/Kconfig
/openbmc/qemu/hw/openrisc/boot.c
/openbmc/qemu/hw/openrisc/cputimer.c
/openbmc/qemu/hw/openrisc/meson.build
/openbmc/qemu/hw/openrisc/openrisc_sim.c
/openbmc/qemu/hw/openrisc/virt.c
/openbmc/qemu/hw/pci-host/meson.build
/openbmc/qemu/hw/pci-host/pnv_phb.c
/openbmc/qemu/hw/pci-host/pnv_phb.h
/openbmc/qemu/hw/pci-host/pnv_phb3.c
/openbmc/qemu/hw/pci-host/pnv_phb4.c
/openbmc/qemu/hw/pci-host/pnv_phb4_pec.c
/openbmc/qemu/hw/ppc/Kconfig
/openbmc/qemu/hw/ppc/meson.build
/openbmc/qemu/hw/ppc/pnv.c
/openbmc/qemu/hw/ppc/pnv_sbe.c
/openbmc/qemu/hw/ppc/pnv_xscom.c
/openbmc/qemu/hw/ppc/ppc405.h
/openbmc/qemu/hw/ppc/ppc405_boards.c
/openbmc/qemu/hw/ppc/ppc405_uc.c
/openbmc/qemu/hw/ppc/ppc440_bamboo.c
/openbmc/qemu/hw/ppc/ppc440_uc.c
/openbmc/qemu/hw/ppc/ppc4xx_devs.c
/openbmc/qemu/hw/ppc/ppc4xx_pci.c
/openbmc/qemu/hw/ppc/sam460ex.c
/openbmc/qemu/hw/ppc/spapr.c
/openbmc/qemu/hw/ppc/trace-events
/openbmc/qemu/hw/ppc/virtex_ml507.c
/openbmc/qemu/hw/rtc/goldfish_rtc.c
/openbmc/qemu/hw/s390x/s390-virtio-ccw.c
/openbmc/qemu/hw/scsi/esp.c
/openbmc/qemu/hw/scsi/lsi53c895a.c
/openbmc/qemu/hw/scsi/megasas.c
/openbmc/qemu/hw/scsi/mptsas.c
/openbmc/qemu/hw/scsi/scsi-bus.c
/openbmc/qemu/hw/scsi/scsi-disk.c
/openbmc/qemu/hw/scsi/scsi-generic.c
/openbmc/qemu/hw/scsi/spapr_vscsi.c
/openbmc/qemu/hw/scsi/virtio-scsi-dataplane.c
/openbmc/qemu/hw/scsi/virtio-scsi.c
/openbmc/qemu/hw/scsi/vmw_pvscsi.c
/openbmc/qemu/hw/usb/dev-storage.c
/openbmc/qemu/hw/usb/dev-uas.c
/openbmc/qemu/hw/usb/hcd-xhci.c
/openbmc/qemu/hw/virtio/vhost-iova-tree.c
/openbmc/qemu/hw/virtio/vhost-iova-tree.h
/openbmc/qemu/hw/virtio/vhost-shadow-virtqueue.c
/openbmc/qemu/hw/virtio/vhost-user.c
/openbmc/qemu/hw/virtio/vhost-vdpa.c
/openbmc/qemu/hw/virtio/vhost.c
/openbmc/qemu/hw/virtio/virtio-pci.c
/openbmc/qemu/include/elf.h
/openbmc/qemu/include/exec/cpu-all.h
/openbmc/qemu/include/exec/cpu-common.h
/openbmc/qemu/include/exec/exec-all.h
/openbmc/qemu/include/exec/translator.h
/openbmc/qemu/include/fpu/softfloat-types.h
/openbmc/qemu/include/hw/boards.h
/openbmc/qemu/include/hw/i386/pc.h
/openbmc/qemu/include/hw/intc/ppc-uic.h
/openbmc/qemu/include/hw/openrisc/boot.h
/openbmc/qemu/include/hw/pci-host/pnv_phb3.h
/openbmc/qemu/include/hw/pci-host/pnv_phb4.h
/openbmc/qemu/include/hw/ppc/pnv.h
/openbmc/qemu/include/hw/ppc/pnv_sbe.h
/openbmc/qemu/include/hw/ppc/pnv_xscom.h
/openbmc/qemu/include/hw/ppc/ppc4xx.h
/openbmc/qemu/include/hw/rtc/goldfish_rtc.h
/openbmc/qemu/include/hw/scsi/scsi.h
/openbmc/qemu/include/hw/virtio/vhost-vdpa.h
/openbmc/qemu/include/net/net.h
/openbmc/qemu/include/qemu/iova-tree.h
/openbmc/qemu/include/qemu/mmap-alloc.h
/openbmc/qemu/include/sysemu/os-win32.h
/openbmc/qemu/linux-user/arm/target_cpu.h
/openbmc/qemu/linux-user/elfload.c
/openbmc/qemu/linux-user/mmap.c
/openbmc/qemu/linux-user/qemu.h
/openbmc/qemu/linux-user/syscall.c
/openbmc/qemu/meson.build
/openbmc/qemu/meson_options.txt
/openbmc/qemu/net/colo.c
/openbmc/qemu/net/colo.h
/openbmc/qemu/net/trace-events
/openbmc/qemu/net/vhost-vdpa.c
/openbmc/qemu/pc-bios/README
/openbmc/qemu/pc-bios/keymaps/meson.build
/openbmc/qemu/pc-bios/slof.bin
/openbmc/qemu/plugins/meson.build
/openbmc/qemu/qapi/meson.build
/openbmc/qemu/qemu-options.hx
/openbmc/qemu/roms/SLOF
/openbmc/qemu/softmmu/physmem.c
/openbmc/qemu/softmmu/vl.c
/openbmc/qemu/target/alpha/translate.c
/openbmc/qemu/target/arm/cpu.c
/openbmc/qemu/target/arm/translate.c
/openbmc/qemu/target/avr/helper.c
/openbmc/qemu/target/avr/translate.c
/openbmc/qemu/target/cris/translate.c
/openbmc/qemu/target/hexagon/translate.c
/openbmc/qemu/target/hppa/op_helper.c
/openbmc/qemu/target/hppa/translate.c
/openbmc/qemu/target/i386/kvm/kvm.c
/openbmc/qemu/target/i386/ops_sse.h
/openbmc/qemu/target/i386/ops_sse_header.h
/openbmc/qemu/target/i386/tcg/translate.c
/openbmc/qemu/target/loongarch/README
/openbmc/qemu/target/loongarch/fpu_helper.c
/openbmc/qemu/target/loongarch/helper.h
/openbmc/qemu/target/loongarch/insn_trans/trans_fmov.c.inc
/openbmc/qemu/target/loongarch/translate.c
/openbmc/qemu/target/m68k/translate.c
/openbmc/qemu/target/microblaze/translate.c
translate.c
/openbmc/qemu/target/nios2/translate.c
/openbmc/qemu/target/openrisc/cpu.c
/openbmc/qemu/target/openrisc/cpu.h
/openbmc/qemu/target/openrisc/interrupt.c
/openbmc/qemu/target/openrisc/mmu.c
/openbmc/qemu/target/openrisc/sys_helper.c
/openbmc/qemu/target/openrisc/translate.c
/openbmc/qemu/target/ppc/cpu-qom.h
/openbmc/qemu/target/ppc/cpu.c
/openbmc/qemu/target/ppc/cpu_init.c
/openbmc/qemu/target/ppc/fpu_helper.c
/openbmc/qemu/target/ppc/machine.c
/openbmc/qemu/target/ppc/translate.c
/openbmc/qemu/target/riscv/meson.build
/openbmc/qemu/target/riscv/translate.c
/openbmc/qemu/target/rx/translate.c
/openbmc/qemu/target/s390x/cpu_features_def.h.inc
/openbmc/qemu/target/s390x/gen-features.c
/openbmc/qemu/target/s390x/tcg/insn-data.def
/openbmc/qemu/target/s390x/tcg/translate.c
/openbmc/qemu/target/sh4/translate.c
/openbmc/qemu/target/sparc/translate.c
/openbmc/qemu/target/tricore/translate.c
/openbmc/qemu/target/xtensa/translate.c
/openbmc/qemu/tests/avocado/avocado_qemu/__init__.py
/openbmc/qemu/tests/avocado/info_usernet.py
/openbmc/qemu/tests/avocado/machine_aspeed.py
/openbmc/qemu/tests/avocado/migration.py
/openbmc/qemu/tests/avocado/replay_linux.py
/openbmc/qemu/tests/fp/meson.build
/openbmc/qemu/tests/migration/aarch64/a-b-kernel.S
/openbmc/qemu/tests/migration/aarch64/a-b-kernel.h
/openbmc/qemu/tests/migration/i386/a-b-bootblock.S
/openbmc/qemu/tests/migration/i386/a-b-bootblock.h
/openbmc/qemu/tests/migration/stress.c
/openbmc/qemu/tests/qapi-schema/meson.build
/openbmc/qemu/tests/qtest/ac97-test.c
/openbmc/qemu/tests/qtest/bios-tables-test.c
/openbmc/qemu/tests/qtest/cdrom-test.c
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8809baf419-Jul-2022 Peter Maydell <peter.maydell@linaro.org>

target/mips: Handle lock_user() failure in UHI_plog semihosting call

Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting

target/mips: Handle lock_user() failure in UHI_plog semihosting call

Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting
call. Add the missing error handling.

report_fault() is rather brutal in that it will call abort(), but
this is the same error-handling used in the rest of this file.

Resolves: Coverity CID 1490684
Fixes: ea4210600db3c5 ("target/mips: Avoid qemu_semihosting_log_out for UHI_plog")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220719191737.384744-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

d44971e729-Jul-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Advance pc after semihosting exception

Delay generating the exception until after we know the
insn length, and record that length in env->error_code.

Fixes: 8ec7e3c53d4 ("target/mips:

target/mips: Advance pc after semihosting exception

Delay generating the exception until after we know the
insn length, and record that length in env->error_code.

Fixes: 8ec7e3c53d4 ("target/mips: Use an exception for semihosting")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1126
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


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b10ccec128-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING

Inline these macros into the only two callers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <r

target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING

Inline these macros into the only two callers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220628111701.677216-9-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

3bb45bbc28-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Simplify UHI_argnlen and UHI_argn

With semihosting_get_arg, we already have a check vs argc, so
there's no point replicating it -- just check the result vs NULL.
Merge copy_argn_to_targ

target/mips: Simplify UHI_argnlen and UHI_argn

With semihosting_get_arg, we already have a check vs argc, so
there's no point replicating it -- just check the result vs NULL.
Merge copy_argn_to_target into its caller.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-8-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

412411b328-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Use error_report for UHI_assert

Always log the assert locally. Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings b

target/mips: Use error_report for UHI_assert

Always log the assert locally. Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings before the abort().

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-6-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

ea42106028-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Avoid qemu_semihosting_log_out for UHI_plog

Use semihost_sys_write and/or qemu_semihosting_console_write
for implementing plog. When using gdbstub, copy the temp
string below the stack

target/mips: Avoid qemu_semihosting_log_out for UHI_plog

Use semihost_sys_write and/or qemu_semihosting_console_write
for implementing plog. When using gdbstub, copy the temp
string below the stack so that gdb has a guest address from
which to perform the log.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-5-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

18639a2828-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Use semihosting/syscalls.h

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Hen

target/mips: Use semihosting/syscalls.h

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-4-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

3d748e4128-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Drop link syscall from semihosting

We don't implement it with _WIN32 hosts, and the syscall
is missing from the gdb remote file i/o interface.
Since we can't implement it universally, d

target/mips: Drop link syscall from semihosting

We don't implement it with _WIN32 hosts, and the syscall
is missing from the gdb remote file i/o interface.
Since we can't implement it universally, drop it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-3-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

d53a3ed428-Jun-2022 Richard Henderson <richard.henderson@linaro.org>

target/mips: Create report_fault for semihosting

The UHI specification does not have an EFAULT value,
and further specifies that "undefined UHI operations
should not return control to the target".

target/mips: Create report_fault for semihosting

The UHI specification does not have an EFAULT value,
and further specifies that "undefined UHI operations
should not return control to the target".

So, log the error and abort.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-2-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

dadd071a20-Jun-2022 Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>

target/mips: implement Octeon-specific arithmetic instructions

This patch implements several Octeon-specific instructions:
- BADDU
- DMUL
- EXTS/EXTS32
- CINS/CINS32
- POP/DPOP
- SEQ/SEQI
- SNE/SNEI

target/mips: implement Octeon-specific arithmetic instructions

This patch implements several Octeon-specific instructions:
- BADDU
- DMUL
- EXTS/EXTS32
- CINS/CINS32
- POP/DPOP
- SEQ/SEQI
- SNE/SNEI

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572673245.167724.17377788816335619000.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

5e806fb020-Jun-2022 Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>

target/mips: implement Octeon-specific BBIT instructions

This patch introduces Octeon-specific decoder and implements
check-bit-and-jump instructions.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyu

target/mips: implement Octeon-specific BBIT instructions

This patch introduces Octeon-specific decoder and implements
check-bit-and-jump instructions.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572672705.167724.16667636081912075906.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

72d680e420-Jun-2022 Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>

target/mips: introduce decodetree structure for Cavium Octeon extension

This patch adds decodetree for Cavium Octeon extension and
an instruction set extension flag for using it in CPU models.

Sign

target/mips: introduce decodetree structure for Cavium Octeon extension

This patch adds decodetree for Cavium Octeon extension and
an instruction set extension flag for using it in CPU models.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572672162.167724.13656301229517693806.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...


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