1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #ifndef EXEC__TRANSLATOR_H 11 #define EXEC__TRANSLATOR_H 12 13 /* 14 * Include this header from a target-specific file, and add a 15 * 16 * DisasContextBase base; 17 * 18 * member in your target-specific DisasContext. 19 */ 20 21 22 #include "qemu/bswap.h" 23 #include "exec/exec-all.h" 24 #include "exec/cpu_ldst.h" 25 #include "exec/plugin-gen.h" 26 #include "exec/translate-all.h" 27 #include "tcg/tcg.h" 28 29 /** 30 * gen_intermediate_code 31 * @cpu: cpu context 32 * @tb: translation block 33 * @max_insns: max number of instructions to translate 34 * @pc: guest virtual program counter address 35 * @host_pc: host physical program counter address 36 * 37 * This function must be provided by the target, which should create 38 * the target-specific DisasContext, and then invoke translator_loop. 39 */ 40 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns, 41 target_ulong pc, void *host_pc); 42 43 /** 44 * DisasJumpType: 45 * @DISAS_NEXT: Next instruction in program order. 46 * @DISAS_TOO_MANY: Too many instructions translated. 47 * @DISAS_NORETURN: Following code is dead. 48 * @DISAS_TARGET_*: Start of target-specific conditions. 49 * 50 * What instruction to disassemble next. 51 */ 52 typedef enum DisasJumpType { 53 DISAS_NEXT, 54 DISAS_TOO_MANY, 55 DISAS_NORETURN, 56 DISAS_TARGET_0, 57 DISAS_TARGET_1, 58 DISAS_TARGET_2, 59 DISAS_TARGET_3, 60 DISAS_TARGET_4, 61 DISAS_TARGET_5, 62 DISAS_TARGET_6, 63 DISAS_TARGET_7, 64 DISAS_TARGET_8, 65 DISAS_TARGET_9, 66 DISAS_TARGET_10, 67 DISAS_TARGET_11, 68 } DisasJumpType; 69 70 /** 71 * DisasContextBase: 72 * @tb: Translation block for this disassembly. 73 * @pc_first: Address of first guest instruction in this TB. 74 * @pc_next: Address of next guest instruction in this TB (current during 75 * disassembly). 76 * @is_jmp: What instruction to disassemble next. 77 * @num_insns: Number of translated instructions (including current). 78 * @max_insns: Maximum number of instructions to be translated in this TB. 79 * @singlestep_enabled: "Hardware" single stepping enabled. 80 * 81 * Architecture-agnostic disassembly context. 82 */ 83 typedef struct DisasContextBase { 84 const TranslationBlock *tb; 85 target_ulong pc_first; 86 target_ulong pc_next; 87 DisasJumpType is_jmp; 88 int num_insns; 89 int max_insns; 90 bool singlestep_enabled; 91 #ifdef CONFIG_USER_ONLY 92 /* 93 * Guest address of the last byte of the last protected page. 94 * 95 * Pages containing the translated instructions are made non-writable in 96 * order to achieve consistency in case another thread is modifying the 97 * code while translate_insn() fetches the instruction bytes piecemeal. 98 * Such writer threads are blocked on mmap_lock() in page_unprotect(). 99 */ 100 target_ulong page_protect_end; 101 #endif 102 } DisasContextBase; 103 104 /** 105 * TranslatorOps: 106 * @init_disas_context: 107 * Initialize the target-specific portions of DisasContext struct. 108 * The generic DisasContextBase has already been initialized. 109 * 110 * @tb_start: 111 * Emit any code required before the start of the main loop, 112 * after the generic gen_tb_start(). 113 * 114 * @insn_start: 115 * Emit the tcg_gen_insn_start opcode. 116 * 117 * @translate_insn: 118 * Disassemble one instruction and set db->pc_next for the start 119 * of the following instruction. Set db->is_jmp as necessary to 120 * terminate the main loop. 121 * 122 * @tb_stop: 123 * Emit any opcodes required to exit the TB, based on db->is_jmp. 124 * 125 * @disas_log: 126 * Print instruction disassembly to log. 127 */ 128 typedef struct TranslatorOps { 129 void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); 130 void (*tb_start)(DisasContextBase *db, CPUState *cpu); 131 void (*insn_start)(DisasContextBase *db, CPUState *cpu); 132 void (*translate_insn)(DisasContextBase *db, CPUState *cpu); 133 void (*tb_stop)(DisasContextBase *db, CPUState *cpu); 134 void (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f); 135 } TranslatorOps; 136 137 /** 138 * translator_loop: 139 * @cpu: Target vCPU. 140 * @tb: Translation block. 141 * @max_insns: Maximum number of insns to translate. 142 * @pc: guest virtual program counter address 143 * @host_pc: host physical program counter address 144 * @ops: Target-specific operations. 145 * @db: Disassembly context. 146 * 147 * Generic translator loop. 148 * 149 * Translation will stop in the following cases (in order): 150 * - When is_jmp set by #TranslatorOps::breakpoint_check. 151 * - set to DISAS_TOO_MANY exits after translating one more insn 152 * - set to any other value than DISAS_NEXT exits immediately. 153 * - When is_jmp set by #TranslatorOps::translate_insn. 154 * - set to any value other than DISAS_NEXT exits immediately. 155 * - When the TCG operation buffer is full. 156 * - When single-stepping is enabled (system-wide or on the current vCPU). 157 * - When too many instructions have been translated. 158 */ 159 void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns, 160 target_ulong pc, void *host_pc, 161 const TranslatorOps *ops, DisasContextBase *db); 162 163 void translator_loop_temp_check(DisasContextBase *db); 164 165 /** 166 * translator_use_goto_tb 167 * @db: Disassembly context 168 * @dest: target pc of the goto 169 * 170 * Return true if goto_tb is allowed between the current TB 171 * and the destination PC. 172 */ 173 bool translator_use_goto_tb(DisasContextBase *db, target_ulong dest); 174 175 /* 176 * Translator Load Functions 177 * 178 * These are intended to replace the direct usage of the cpu_ld*_code 179 * functions and are mandatory for front-ends that have been migrated 180 * to the common translator_loop. These functions are only intended 181 * to be called from the translation stage and should not be called 182 * from helper functions. Those functions should be converted to encode 183 * the relevant information at translation time. 184 */ 185 186 #define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \ 187 type fullname ## _swap(CPUArchState *env, DisasContextBase *dcbase, \ 188 abi_ptr pc, bool do_swap); \ 189 static inline type fullname(CPUArchState *env, \ 190 DisasContextBase *dcbase, abi_ptr pc) \ 191 { \ 192 return fullname ## _swap(env, dcbase, pc, false); \ 193 } 194 195 #define FOR_EACH_TRANSLATOR_LD(F) \ 196 F(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) \ 197 F(translator_lduw, uint16_t, cpu_lduw_code, bswap16) \ 198 F(translator_ldl, uint32_t, cpu_ldl_code, bswap32) \ 199 F(translator_ldq, uint64_t, cpu_ldq_code, bswap64) 200 201 FOR_EACH_TRANSLATOR_LD(GEN_TRANSLATOR_LD) 202 203 #undef GEN_TRANSLATOR_LD 204 205 /* 206 * Return whether addr is on the same page as where disassembly started. 207 * Translators can use this to enforce the rule that only single-insn 208 * translation blocks are allowed to cross page boundaries. 209 */ 210 static inline bool is_same_page(const DisasContextBase *db, target_ulong addr) 211 { 212 return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0; 213 } 214 215 #endif /* EXEC__TRANSLATOR_H */ 216