| #
759cfc27
|
| 19-Jan-2023 |
Joel Stanley <joel@jms.id.au> |
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
d6cf8357
|
| 21-Mar-2025 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250321092623.2097234-12-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
show more ...
|
| #
a79c4ae0
|
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com> Reviewed-by: Titus Rwantare <titusr@google.com> [ clg: - replaced softmmu_ss with system_ss in meson.build files - local variable renames in aspeed_i3c_realize() ]
show more ...
|
| #
acd342d0
|
| 07-Apr-2021 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual mac
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual machines described in :
https://github.com/cminyard/openipmi/blob/master/lanserv/README.vm
and implemented by the 'ipmi-bmc-extern' model on the host side.
To use, start the Aspeed BMC machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,ipv4,server,nowait \ -global driver=aspeed.ibt,property=chardev,value=ipmi0
and the PowerNV machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,reconnect=10 \ -device ipmi-bmc-extern,id=bmc0,chardev=ipmi0 \ -device isa-ipmi-bt,bmc=bmc0,irq=10 -nodefaults
Cc: Hao Wu <wuhaotsh@google.com> Cc: Corey Minyard <cminyard@mvista.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
show more ...
|
| #
b302cf38
|
| 27-Nov-2017 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add basic Aspeed PWM model
Just enough to quiet down the output when running with the logs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
| #
7d099a9f
|
| 19-Jan-2023 |
Joel Stanley <joel@jms.id.au> |
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
23399d64
|
| 21-Mar-2025 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250321092623.2097234-12-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
show more ...
|
| #
3408cea9
|
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com> Reviewed-by: Titus Rwantare <titusr@google.com> [ clg: - replaced softmmu_ss with system_ss in meson.build files - local variable renames in aspeed_i3c_realize() ]
show more ...
|
| #
2624cb21
|
| 07-Apr-2021 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual mac
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual machines described in :
https://github.com/cminyard/openipmi/blob/master/lanserv/README.vm
and implemented by the 'ipmi-bmc-extern' model on the host side.
To use, start the Aspeed BMC machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,ipv4,server,nowait \ -global driver=aspeed.ibt,property=chardev,value=ipmi0
and the PowerNV machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,reconnect=10 \ -device ipmi-bmc-extern,id=bmc0,chardev=ipmi0 \ -device isa-ipmi-bt,bmc=bmc0,irq=10 -nodefaults
Cc: Hao Wu <wuhaotsh@google.com> Cc: Corey Minyard <cminyard@mvista.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
show more ...
|
| #
eb515b3f
|
| 27-Nov-2017 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add basic Aspeed PWM model
Just enough to quiet down the output when running with the logs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
| #
e147595d
|
| 19-Jan-2023 |
Joel Stanley <joel@jms.id.au> |
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
559e1a90
|
| 21-Mar-2025 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-
hw/misc/aspeed_hace: Add trace-events for better debugging
Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg", "trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250321092623.2097234-12-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
show more ...
|
| #
eb52292c
|
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com> Reviewed-by: Titus Rwantare <titusr@google.com> [ clg: - replaced softmmu_ss with system_ss in meson.build files - local variable renames in aspeed_i3c_realize() ]
show more ...
|
| #
72284cf9
|
| 07-Apr-2021 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual mac
hw/misc: Add an iBT device model
Implement an IPMI BT interface model using a chardev backend to communicate with an external PowerNV machine. It uses the OpenIPMI simulator protocol for virtual machines described in :
https://github.com/cminyard/openipmi/blob/master/lanserv/README.vm
and implemented by the 'ipmi-bmc-extern' model on the host side.
To use, start the Aspeed BMC machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,ipv4,server,nowait \ -global driver=aspeed.ibt,property=chardev,value=ipmi0
and the PowerNV machine with :
-chardev socket,id=ipmi0,host=localhost,port=9002,reconnect=10 \ -device ipmi-bmc-extern,id=bmc0,chardev=ipmi0 \ -device isa-ipmi-bt,bmc=bmc0,irq=10 -nodefaults
Cc: Hao Wu <wuhaotsh@google.com> Cc: Corey Minyard <cminyard@mvista.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
show more ...
|
| #
c45fdc3f
|
| 27-Nov-2017 |
Cédric Le Goater <clg@kaod.org> |
hw/misc: Add basic Aspeed PWM model
Just enough to quiet down the output when running with the logs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
|
| #
48c5d4bc
|
| 19-Jan-2023 |
Joel Stanley <joel@jms.id.au> |
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.
hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
f41af4c5
|
| 20-Feb-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-target-arm-20250220' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix some incorrect syndrome values in various sysreg traps * Clean up sysre
Merge tag 'pull-target-arm-20250220' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix some incorrect syndrome values in various sysreg traps * Clean up sysreg trap code to avoid similar future bugs * Make boards/SoCs using a9mpcore and a15mpcore objects specify number of GIC interrupts explicitly * Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX * target/arm: Use uint32_t in t32_expandimm_imm() * New board model: NPCM845 Evaluation board "npcm845-evb"
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAme3Vk8ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3t8QD/48yOUtFwUMFrwbbszK5rss # Ghhtk0ylKIxPQirgzjLUNq4hV2MZEtdmyiqaEllvA0aS839oWhFW0hbsGmoL/TVF # tqXVP3Y1dMubmNHCGcgiFqaxaInnNSC9S1ALiEm5a37g519706WLXPVLqJJ9t31b # uWHKT1hqxstzWSExhGrEkSEghcgN3u1KyCz0zyq9bk/F3OFWZfHNH6JqutQX18Ua # 5HtcD1Pum6WjayBc3y4AYVYH4xyQclY7LPR+zKNf2d5GuZ+J6MlXMyfCuE2/J//m # wHAtAoeuFhi/HFHR4vQP4L7HrhFrECbjfWha85F/rmiOAo6LnbICyPt4tAPe5So3 # FCtSHfht9ToulBqULE+F/AWVCdt8UeDRgOANSHFsMkxYiUK8QpMv8A2AtwJUqiMp # WbAzw31f6SgANgFQObhoRNE3QyX8V53ZJAsPhDooTxwMiglqVTM3Xux8W2zz9FdU # BTwCy23efBqKf4RWfeHjAXctGshePI1mTBJmvEKG5G5ligMNeg7ZiQqqfRVBagc/ # gpsQKNjpN9MVVds3thUvMCYO/9NOeeAtcVA2vW7qf7HrYaM72UngCPWjhNfAj/9I # 9hxgqEnKC6qoD/zMyFv+XwqNlL1PuD79rbvN8TWFd/f8iBIYOY6WVEYmsi7WGugI # WzYI93RqFaQhrpyHDcRVGw== # =djUd # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Feb 2025 00:20:31 HKT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20250220' of https://git.linaro.org/people/pmaydell/qemu-arm: (41 commits) docs/system/arm: Add Description for NPCM8XX SoC hw/arm: Add NPCM845 Evaluation board hw/arm: Add NPCM8XX SoC hw/net: Add NPCM8XX PCS Module hw/misc: Support NPCM8XX CLK Module Registers hw/misc: Add nr_regs and cold_reset_values to NPCM CLK hw/misc: Move NPCM7XX CLK to NPCM CLK hw/misc: Rename npcm7xx_clk to npcm_clk hw/misc: Support 8-bytes memop in NPCM GCR module hw/misc: Store DRAM size in NPCM8XX GCR Module hw/misc: Add support for NPCM8XX GCR hw/misc: Add nr_regs and cold_reset_values to NPCM GCR hw/misc: Move NPCM7XX GCR to NPCM GCR hw/misc: Rename npcm7xx_gcr to npcm_gcr hw/ssi: Make flash size a property in NPCM7XX FIU pc-bios: Add NPCM8XX vBootrom roms: Update vbootrom to 1287b6e target/arm: Use uint32_t in t32_expandimm_imm() Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX hw/cpu/arm_mpcore: Remove default values for GIC external IRQs ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
show more ...
|
| #
ca6d6a94
|
| 19-Feb-2025 |
Hao Wu <wuhaotsh@google.com> |
hw/misc: Move NPCM7XX CLK to NPCM CLK
A lot of NPCM7XX and NPCM8XX CLK modules share the same code, this commit moves the NPCM7XX CLK to NPCM CLK for these properties.
Reviewed-by: Peter Maydell <p
hw/misc: Move NPCM7XX CLK to NPCM CLK
A lot of NPCM7XX and NPCM8XX CLK modules share the same code, this commit moves the NPCM7XX CLK to NPCM CLK for these properties.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20250219184609.1839281-12-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
| #
ca2fd966
|
| 19-Feb-2025 |
Hao Wu <wuhaotsh@google.com> |
hw/misc: Support 8-bytes memop in NPCM GCR module
The NPCM8xx GCR device can be accessed with 64-bit memory operations. This patch supports that.
Reviewed-by: Peter Maydell <peter.maydell@linaro.or
hw/misc: Support 8-bytes memop in NPCM GCR module
The NPCM8xx GCR device can be accessed with 64-bit memory operations. This patch supports that.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daude <philmd@linaro.org> Message-id: 20250219184609.1839281-10-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
| #
c99064e6
|
| 19-Feb-2025 |
Hao Wu <wuhaotsh@google.com> |
hw/misc: Move NPCM7XX GCR to NPCM GCR
A lot of NPCM7XX and NPCM8XX GCR modules share the same code, this commit moves the NPCM7XX GCR to NPCM GCR for these properties.
Reviewed-by: Peter Maydell <p
hw/misc: Move NPCM7XX GCR to NPCM GCR
A lot of NPCM7XX and NPCM8XX GCR modules share the same code, this commit moves the NPCM7XX GCR to NPCM GCR for these properties.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20250219184609.1839281-6-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
| #
f65f3261
|
| 02-Feb-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250131' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove uses of &first_cpu in rx-gdbsim and loongson3_virt machines (Philippe) - Convert few legacy qemu
Merge tag 'hw-misc-20250131' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove uses of &first_cpu in rx-gdbsim and loongson3_virt machines (Philippe) - Convert few legacy qemu_allocate_irqs to qemu_init_irqs (Philippe) - Add tracing events in i2c-echo device (Titus) - Fix debug format string in USB EHCI (Zoltan) - Rework loader API to remove its target_words_bigendian() call (Philippe) - QOMify OMAP MMC device (Peter) - Remove legacy SD Card APIs (Peter)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmedOmkACgkQ4+MsLN6t # wN4qHhAAtL3vmk6hQgKD76bSaB3CDEdHsnS7qqeRVVmbr7pQL9D6yyXzkjJBzZtk # nG7ubhoS5WFeKswzD8tY/mgP25hntnq38TNrRxDrpRNdFYF+a2cncpRGfgzk0z/9 # nme/BuUx6fNowV8MVGLNOLvaDCeDHl9biTLJmcQyqwlHy9l9Wi6DSa6Xi9ZQWlHi # fxYVeuQ7HYlKwhiu3mqpfNeauIgMSWz8V48ETCrFnjMWmiF1k1L0GccWDS8zpPDk # QkdOxHC4eVMxk0d2458eUXeqo/izfzoc7Z9hW6W8cyI69y4m011xqANd/udTS03E # HMcG9Ks0E+Yw8NGoErOP7zu8yFVEzCn2BKhH/wrUHBC2UfP99vNR/b8LNkg25y19 # IItOkMban0Oyr9KaNb1Ga+3pZIsyyil+shSYNHpWkfqk+TUpZkMUSaVHA9r1oB3V # u/dOO/lPLaWMvftKVXRl3K/Lfz4WF5cWjza5RratnzbBqqwr03CwjjBEuZIX/5ww # ATj/fV10OSHScxCqauYp8uuNSgEOKaJCJe2uEMaLvxn/O9ka0FQZ5CLUJ0yIKs/t # Tg4sS0QLgmpaXwSnscKoVE7aHWNFT1WomHI4SjWbwUQhmm0DmPizBZ2yX8dnSR24 # ubtzmxNYFWScrUTGQvbMhkU6I+Sc0Ca8APmPxErNV2mzF4p3CPE= # =Jvwi # -----END PGP SIGNATURE----- # gpg: Signature made Fri 31 Jan 2025 16:02:33 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250131' of https://github.com/philmd/qemu: (36 commits) hw/sd: Remove unused SDState::enable hw/sd: Remove unused legacy functions, stop killing mammoths hw/sd: Remove unused 'enable' method from SDCardClass hw/sd/omap_mmc: Untabify hw/sd/omap_mmc: Remove unused coverswitch qemu_irq hw/arm/omap1: Inline creation of MMC hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices hw/sd/omap_mmc: Convert to SDBus API hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCState hw/sd/omap_mmc: Do a minimal conversion to QDev hw/loader: Pass ELFDATA endian order argument to load_elf() hw/loader: Pass ELFDATA endian order argument to load_elf_as() hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym() hw/loader: Clarify local variable name in load_elf_ram_sym() hw/loader: Remove unused load_elf_ram() hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as() hw/usb/hcd-ehci: Fix debug printf format string hw/misc/i2c-echo: add tracing hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irq ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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|
| #
fd7d66de
|
| 21-Jan-2025 |
Titus Rwantare <titusr@google.com> |
hw/misc/i2c-echo: add tracing
This has been useful when debugging and unsure if the guest is generating i2c traffic.
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@
hw/misc/i2c-echo: add tracing
This has been useful when debugging and unsure if the guest is generating i2c traffic.
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250121105935.3069035-1-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
show more ...
|
| #
7433709a
|
| 14-Jan-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework Xi
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework XilinX EthLite RAM buffers (Philippe) - Convert vmcoreinfo to 3-phase reset (Philippe) - Convert HPPA CPUs to 3-phase reset (Helge) - Fix UFS endianness issue (Keoseong) - Introduce pci_set_enabled (Akihiko) - Clarify Enclave and Firecracker relationship (Alexander) - Set SDHCI DMA interrupt status bit in correct place (Bernhard) - Fix leak in cryptodev-vhost-user backend (Gabriel) - Fixes on PCI USB XHCI (Phil) - Convert DPRINTF to trace events (Nikita, Bernhard) - Remove &first_cpu in TriCore machine (Philippe) - Checkpatch style cleanups (Bibo) - MAINTAINERS updates (Marcin, Gustavo, Akihiko) - Add default configuration for b4 tool (Jiaxun)
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* tag 'hw-misc-20250113' of https://github.com/philmd/qemu: (55 commits) Add a b4 configuration file MAINTAINERS: Update path to coreaudio.m MAINTAINERS: Add me as the maintainer for ivshmem-flat MAINTAINERS: remove myself from sbsa-ref hw/tricore/triboard: Remove unnecessary use of &first_cpu hw/usb/hcd-xhci-pci: Use event ring 0 if mapping unsupported hw/usb/hcd-xhci-pci: Use modulo to select MSI vector as per spec backends/cryptodev-vhost-user: Fix local_error leaks hw/loongarch/virt: Checkpatch cleanup target/hppa: Speed up hppa_is_pa20() target/hppa: Set PC on vCPU reset target/hppa: Only set PSW 'M' bit on reset hw/hppa: Reset vCPUs calling resettable_reset() target/hppa: Convert hppa_cpu_init() to ResetHold handler tests: Add functional tests for HPPA machines tests/qtest/boot-serial-test: Correct HPPA machine name hw/gpio/imx_gpio: Turn DPRINTF() into trace events hw/i2c/imx_i2c: Convert DPRINTF() to trace events hw/char/imx_serial: Turn some DPRINTF() statements into trace events hw/misc/imx6_src: Convert DPRINTF() to trace events ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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| 08-Jan-2025 |
Bernhard Beschow <shentey@gmail.com> |
hw/misc/imx6_src: Convert DPRINTF() to trace events
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <phi
hw/misc/imx6_src: Convert DPRINTF() to trace events
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108092538.11474-14-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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8b70d7f2
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| 01-Jan-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20241231' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Allow more than 4 legacy IRQs on Generic PCI Express Bridge (Alexander) - Add MMIO-based Inter-VM
Merge tag 'hw-misc-20241231' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Allow more than 4 legacy IRQs on Generic PCI Express Bridge (Alexander) - Add MMIO-based Inter-VM shared memory device 'ivshmem-flat' (Gustavo) - Use UHCI register definitions (Guenter) - Propagate CPU endianness to microblaze_load_kernel (Philippe) - Mark x86/TriCore devices as little-endian, OpenRISC/SPARC as big (Philippe) - Don't set callback_opaque NULL in fw_cfg_modify_bytes_read (Shameer) - Simplify non-KVM checks on AMD IOMMU XTSup feature (Philippe) - Trivial cleanups on xilinx_ethlite, vmcoreinfo, qxl (Philippe, Hyman) - Move USB-HCD-XHCI msi/msix properties from NEC to superclass (Phil) - Redesign of main thread event handling due to macOS Cocoa (Phil) - Introduce ParavirtualizedGraphics.Framework support 'apple-gfx' (Phil) - Pad short Ethernet frames on macOS vmnet (William)
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* tag 'hw-misc-20241231' of https://github.com/philmd/qemu: (29 commits) hw/display/qxl: Do not use C99 // comments net/vmnet: Pad short Ethernet frames MAINTAINERS: Add myself as maintainer for apple-gfx, reviewer for HVF hw/display/apple-gfx: Adds configurable mode list hw/display/apple-gfx: Adds PCI implementation hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support ui & main loop: Redesign of system-specific main thread event handling hw/usb/hcd-xhci: Unimplemented/guest error logging for port MMIO hw/usb/hcd-xhci-pci: Move msi/msix properties from NEC to superclass hw/block/virtio-blk: Replaces request free function with g_free hw/i386/amd_iommu: Simplify non-KVM checks on XTSup feature hw/misc/vmcoreinfo: Rename opaque pointer as 'opaque' hw/misc/vmcoreinfo: Declare QOM type using DEFINE_TYPES macro fw_cfg: Don't set callback_opaque NULL in fw_cfg_modify_bytes_read() hw/net/xilinx_ethlite: Rename rxbuf -> port_index hw/net/xilinx_ethlite: Correct maximum RX buffer size hw/net/xilinx_ethlite: Update QOM style hw/net/xilinx_ethlite: Remove unuseful debug logs hw/net/xilinx_ethlite: Convert some debug logs to trace events hw/sparc: Mark devices as big-endian ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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