ASoC: Intel: Skylake: Use NHLT API to search for blob

With NHLT enriched with new search functions, remove local code in
favour of them. This also fixes broken behaviour: search should be based
on s

ASoC: Intel: Skylake: Use NHLT API to search for blob

With NHLT enriched with new search functions, remove local code in
favour of them. This also fixes broken behaviour: search should be based
on significant bits count rather than container size.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211126140355.1042684-4-cezary.rojewski@intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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ASoC: Intel: Fix a typo

s/defintions/definitions/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Link: https://lore.kernel.org/r/20210322210105.1575758-1-unixbhaskar@gmail.com
Signed-off-

ASoC: Intel: Fix a typo

s/defintions/definitions/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Link: https://lore.kernel.org/r/20210322210105.1575758-1-unixbhaskar@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: (cosmetic) align function parameters

Fix cppcheck warnings and align headers with code.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https:

ASoC: Intel: Skylake: (cosmetic) align function parameters

Fix cppcheck warnings and align headers with code.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200813200147.61990-22-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Replace zero-length array with flexible-array

The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to dec

ASoC: Intel: Skylake: Replace zero-length array with flexible-array

The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
int stuff;
struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

sizeof(flexible-array-member) triggers a warning because flexible array
members have incomplete type[1]. There are some instances of code in
which the sizeof operator is being incorrectly/erroneously applied to
zero-length arrays and the result is zero. Such instances may be hiding
some bugs. So, this work (flexible-array member conversions) will also
help to get completely rid of those sorts of issues.

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20200511174647.GA17318@embeddedor
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Release topology when we are done with it

Currently topology is kept in memory while driver is running. It's
unnecessary, as it's only needed during parsing.

Signed-off-by: Am

ASoC: Intel: Skylake: Release topology when we are done with it

Currently topology is kept in memory while driver is running. It's
unnecessary, as it's only needed during parsing.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20190827141712.21015-6-amadeuszx.slawinski@linux.intel.com
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: use common NHLT module

No functionality change, only use common functions now.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Takash

ASoC: Intel: Skylake: use common NHLT module

No functionality change, only use common functions now.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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ASoC: Intel: Skylake: move NHLT header to common directory

Prepare move from NHLT code to common directory, starting with header.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.int

ASoC: Intel: Skylake: move NHLT header to common directory

Prepare move from NHLT code to common directory, starting with header.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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ASoC: Intel: Skylake: Remove memory available check

Current memory availability check is a stub, while actual memory
management takes place in firmware. Leave this task to firmware entirely
and remo

ASoC: Intel: Skylake: Remove memory available check

Current memory availability check is a stub, while actual memory
management takes place in firmware. Leave this task to firmware entirely
and remove redundant code.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-5-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Remove MCPS available check

The entire logic for MCPS calculation and DSP scheduling is found
within DSP firmware. Currently driver implements simplistic, inaccurate
logic itse

ASoC: Intel: Skylake: Remove MCPS available check

The entire logic for MCPS calculation and DSP scheduling is found
within DSP firmware. Currently driver implements simplistic, inaccurate
logic itself which may prevent pipeline creation despite firmware being
completely fine its parameters.

Remove that logic and leave the MCPS calculation to DSP alone.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev struct

Skylake driver is divided into two modules:
- snd_soc_skl
- snd_soc_skl_ipc

and nothing would be wrong if not for the fact that both

ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev struct

Skylake driver is divided into two modules:
- snd_soc_skl
- snd_soc_skl_ipc

and nothing would be wrong if not for the fact that both cannot exist
without one another. IPC module is not some kind of extension, as it is
the case for snd_hda_ext_core which is separated from snd_hda_core -
legacy hda interface. It's as much core Skylake module as snd_soc_skl
is.

Statement backed up by existence of circular dependency between this
two. To eliminate said problem, struct skl_sst has been created. From
that very momment, Skylake has been plagued by header errors (incomplete
structs, unknown references etc.) whenever something new is to be added
or code is cleaned up.

As this design is being corrected, struct skl_sst is no longer needed,
so combine it with struct skl. To avoid ambiguity when searching for skl
stuff (struct skl *skl) it has also been renamed to skl_dev.

No functional changes.

Signed-off-by: Piotr Maziarz <piotrx.maziarz@intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Add function to cleanup debugfs interface

Currently debugfs has no cleanup function. Add skl_debufs_exit function
so we can clean after ourselves properly.

Signed-off-by: Amad

ASoC: Intel: Skylake: Add function to cleanup debugfs interface

Currently debugfs has no cleanup function. Add skl_debufs_exit function
so we can clean after ourselves properly.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Fix incorrect capture position reporting

HW recommends to set DUM bit on device power up, so that DPIB write
request occurs every frame regardless of whether DPIB has changed o

ASoC: Intel: Skylake: Fix incorrect capture position reporting

HW recommends to set DUM bit on device power up, so that DPIB write
request occurs every frame regardless of whether DPIB has changed or
not. This addresses incorrect position reporting for capture streams.

Signed-off-by: Leoni Prodduvaka <leoni.prodduvaka@intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation version 2 of the license this program
is distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 100 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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ASoC: Intel: fix interface for Chromebook machine drivers

The changes for HDaudio overlooked the fact that the machine drivers
used for Chromebooks rely on the dmic number information passed as
pdat

ASoC: Intel: fix interface for Chromebook machine drivers

The changes for HDaudio overlooked the fact that the machine drivers
used for Chromebooks rely on the dmic number information passed as
pdata.

Add dmic_num field to standard interface and use standard interface
instead of SKL-specific one.

Also clean-up pdata definition to remove fields that are no longer
used.

Fixes: 842bb5135f10 ('ASoC: Intel: use standard interface for Hdaudio machine driver')
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: use hda_bus instead of hdac_bus

Use hda_bus instead of hdac_bus in the SKL ASoC platform driver to enable
reuse of legacy HDA codec drivers.

Signed-off-by: Rakesh Ughreja <rak

ASoC: Intel: Skylake: use hda_bus instead of hdac_bus

Use hda_bus instead of hdac_bus in the SKL ASoC platform driver to enable
reuse of legacy HDA codec drivers.

Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Boards: Machine driver for SKL+ w/ HDAudio codecs

Add machine driver for Intel platforms (SKL/KBL/BXT/APL) with
HDA and iDisp codecs. This patch adds support for only iDisp (HDMI/DP)
co

ASoC: Intel: Boards: Machine driver for SKL+ w/ HDAudio codecs

Add machine driver for Intel platforms (SKL/KBL/BXT/APL) with
HDA and iDisp codecs. This patch adds support for only iDisp (HDMI/DP)
codec. In the following patches support for HDA codecs will be added.

This should work for other Intel platforms as well e.g. GLK,CNL
however this series is not tested on all the platforms.

Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ALSA: hdac: Remove usage of struct hdac_ext_bus and use hdac_bus instead

This patch removes the hdac_ext_bus structure. The legacy and
enhanced HDaudio capabilities can be handled in a backward-comp

ALSA: hdac: Remove usage of struct hdac_ext_bus and use hdac_bus instead

This patch removes the hdac_ext_bus structure. The legacy and
enhanced HDaudio capabilities can be handled in a backward-compatible
way without separate definitions.

Follow-up patches in this series handle the driver definition.

Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB download

In order to achieve better DMA performance and reduce download time for
firmware and library, it is recommended to disable

ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB download

In order to achieve better DMA performance and reduce download time for
firmware and library, it is recommended to disable dynamic clock and
power gating. In some scenarios, DMA may wait to accumulate more data and
last chunk of data never gets completed if dynamic clock and power
gating is kept enabled.

This patch adds support to disable/enable dynamic clock and power gating
and use it during firmware and library download.

Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: intel: skylake: replace platform to component

Now platform can be replaced to component, let's do it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: "Kp, Jeeja

ASoC: intel: skylake: replace platform to component

Now platform can be replaced to component, let's do it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: "Kp, Jeeja" <jeeja.kp@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Add ssp clock driver

For certain platforms, it is required to start the clocks (mclk/sclk/fs)
before the stream start. Example: for few chrome systems, codec needs the
mclk/scl

ASoC: Intel: Skylake: Add ssp clock driver

For certain platforms, it is required to start the clocks (mclk/sclk/fs)
before the stream start. Example: for few chrome systems, codec needs the
mclk/sclk to be enabled early for a successful clock synchronization and
for few IVI platforms, clock need to be enabled at boot and should be ON
always.

Add the required structures and create set_dma_control ipc to enable or
disable the clock. To enable sclk without fs, mclk ipc structure is used,
else sclkfs ipc structure is used.

Clock prepare/unprepare are used to enable/disable the clock as the IPC
will be sent in non-atomic context. The clk set_dma_control IPC
structures are populated during the set_rate callback and IPC is sent
to enable the clock during prepare callback.

This patch creates virtual clock driver, which allows the machine driver
to use the clock interface to send IPCs to DSP to enable/disable the
clocks.

Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Ensure dai and dailink registration happens in sequence.

Platform registration happens in probe work handler whereas machine
device is registered during skl_probe. This sometim

ASoC: Intel: Skylake: Ensure dai and dailink registration happens in sequence.

Platform registration happens in probe work handler whereas machine
device is registered during skl_probe. This sometimes results in cpu
dais not found if the work handler is sufficiently delayed due to system
load, even with deferred probe of machine driver.

So move machine device registration after registering platform.

Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Parse vendor tokens to build A-State table

A-State table is a power management table which allows the driver to
configure the DSP clock source corresponding to various load thr

ASoC: Intel: Skylake: Parse vendor tokens to build A-State table

A-State table is a power management table which allows the driver to
configure the DSP clock source corresponding to various load thresholds.
The table contains upto 3 A-State entries. The patch adds and parses the
corresponding A-State tokens to build the table.

Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Parse nhlt and register clock device

When NHLT endpoint is present for a SSP then we create clock for that SSP.

MCLK is consistent across endpoints and configuration for an SS

ASoC: Intel: Skylake: Parse nhlt and register clock device

When NHLT endpoint is present for a SSP then we create clock for that SSP.

MCLK is consistent across endpoints and configuration for an SSP, so query
only for first endpoint for an SSP.

For SCLK/SCLKFS, the best fit is queried from the NHLT configurations which
matches the clock rate requested. Best fit is decided based on below:

1. If rate matches with multiple configurations, then the first
configuration is selected.

2. If for a selected fs and bits_per_sample, there are multiple endpoint
configuration match, then the configuration with max number of
channels is selected. So, the user has to set the rate which fits
max number of channels

So we create a platform device and pass clock information parsed as
platform data.

Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Add flag to check to register FE dais from topology

Since FE dais can come from topology, split the FE dais from existing
dai array so that FE dais need not be registered if th

ASoC: Intel: Skylake: Add flag to check to register FE dais from topology

Since FE dais can come from topology, split the FE dais from existing
dai array so that FE dais need not be registered if they come from
topology. Add use_tplg_pcm flag to check whether FE dais will be
registered from topology during dai driver component registration.

Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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ASoC: Intel: Skylake: Add driver structures to be filled from topology manifest

The topology manifest would include module common data including resource
and interface table. The resource table cons

ASoC: Intel: Skylake: Add driver structures to be filled from topology manifest

The topology manifest would include module common data including resource
and interface table. The resource table consists of resources required by
the dsp module such as buffer size, cycles per second, number of
input/output pins. And, the interface table consists of pcm parameters per
module which can be referenced later.

So define the structures accordingly to represent topology manifest data in
the driver.

Signed-off-by: Shreyas NC <shreyas.nc@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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