1 /* 2 * skl.h - HD Audio skylake defintions. 3 * 4 * Copyright (C) 2015 Intel Corp 5 * Author: Jeeja KP <jeeja.kp@intel.com> 6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 18 * 19 */ 20 21 #ifndef __SOUND_SOC_SKL_H 22 #define __SOUND_SOC_SKL_H 23 24 #include <sound/hda_register.h> 25 #include <sound/hdaudio_ext.h> 26 #include <sound/soc.h> 27 #include "skl-nhlt.h" 28 #include "skl-ssp-clk.h" 29 30 #define SKL_SUSPEND_DELAY 2000 31 32 #define SKL_MAX_ASTATE_CFG 3 33 34 #define AZX_PCIREG_PGCTL 0x44 35 #define AZX_PGCTL_LSRMD_MASK (1 << 4) 36 #define AZX_PCIREG_CGCTL 0x48 37 #define AZX_CGCTL_MISCBDCGE_MASK (1 << 6) 38 /* D0I3C Register fields */ 39 #define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */ 40 #define AZX_REG_VS_D0I3C_I3 0x4 /* D0i3 enable */ 41 #define SKL_MAX_DMACTRL_CFG 18 42 #define DMA_CLK_CONTROLS 1 43 #define DMA_TRANSMITION_START 2 44 #define DMA_TRANSMITION_STOP 3 45 46 struct skl_dsp_resource { 47 u32 max_mcps; 48 u32 max_mem; 49 u32 mcps; 50 u32 mem; 51 }; 52 53 struct skl_debug; 54 55 struct skl_astate_param { 56 u32 kcps; 57 u32 clk_src; 58 }; 59 60 struct skl_astate_config { 61 u32 count; 62 struct skl_astate_param astate_table[0]; 63 }; 64 65 struct skl_fw_config { 66 struct skl_astate_config *astate_cfg; 67 }; 68 69 struct skl { 70 struct hdac_ext_bus ebus; 71 struct pci_dev *pci; 72 73 unsigned int init_done:1; /* delayed init status */ 74 struct platform_device *dmic_dev; 75 struct platform_device *i2s_dev; 76 struct platform_device *clk_dev; 77 struct snd_soc_component *component; 78 struct snd_soc_dai_driver *dais; 79 80 struct nhlt_acpi_table *nhlt; /* nhlt ptr */ 81 struct skl_sst *skl_sst; /* sst skl ctx */ 82 83 struct skl_dsp_resource resource; 84 struct list_head ppl_list; 85 struct list_head bind_list; 86 87 const char *fw_name; 88 char tplg_name[64]; 89 unsigned short pci_id; 90 const struct firmware *tplg; 91 92 int supend_active; 93 94 struct work_struct probe_work; 95 96 struct skl_debug *debugfs; 97 u8 nr_modules; 98 struct skl_module **modules; 99 bool use_tplg_pcm; 100 struct skl_fw_config cfg; 101 struct snd_soc_acpi_mach *mach; 102 }; 103 104 #define skl_to_ebus(s) (&(s)->ebus) 105 #define ebus_to_skl(sbus) \ 106 container_of(sbus, struct skl, sbus) 107 108 /* to pass dai dma data */ 109 struct skl_dma_params { 110 u32 format; 111 u8 stream_tag; 112 }; 113 114 struct skl_machine_pdata { 115 u32 dmic_num; 116 bool use_tplg_pcm; /* use dais and dai links from topology */ 117 }; 118 119 struct skl_dsp_ops { 120 int id; 121 unsigned int num_cores; 122 struct skl_dsp_loader_ops (*loader_ops)(void); 123 int (*init)(struct device *dev, void __iomem *mmio_base, 124 int irq, const char *fw_name, 125 struct skl_dsp_loader_ops loader_ops, 126 struct skl_sst **skl_sst); 127 int (*init_fw)(struct device *dev, struct skl_sst *ctx); 128 void (*cleanup)(struct device *dev, struct skl_sst *ctx); 129 }; 130 131 int skl_platform_unregister(struct device *dev); 132 int skl_platform_register(struct device *dev); 133 134 struct nhlt_acpi_table *skl_nhlt_init(struct device *dev); 135 void skl_nhlt_free(struct nhlt_acpi_table *addr); 136 struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, 137 u8 link_type, u8 s_fmt, u8 no_ch, 138 u32 s_rate, u8 dirn, u8 dev_type); 139 140 int skl_get_dmic_geo(struct skl *skl); 141 int skl_nhlt_update_topology_bin(struct skl *skl); 142 int skl_init_dsp(struct skl *skl); 143 int skl_free_dsp(struct skl *skl); 144 int skl_suspend_late_dsp(struct skl *skl); 145 int skl_suspend_dsp(struct skl *skl); 146 int skl_resume_dsp(struct skl *skl); 147 void skl_cleanup_resources(struct skl *skl); 148 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id); 149 void skl_update_d0i3c(struct device *dev, bool enable); 150 int skl_nhlt_create_sysfs(struct skl *skl); 151 void skl_nhlt_remove_sysfs(struct skl *skl); 152 void skl_get_clks(struct skl *skl, struct skl_ssp_clk *ssp_clks); 153 struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id); 154 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps, 155 u32 caps_size, u32 node_id); 156 157 struct skl_module_cfg; 158 159 #ifdef CONFIG_DEBUG_FS 160 struct skl_debug *skl_debugfs_init(struct skl *skl); 161 void skl_debug_init_module(struct skl_debug *d, 162 struct snd_soc_dapm_widget *w, 163 struct skl_module_cfg *mconfig); 164 #else 165 static inline struct skl_debug *skl_debugfs_init(struct skl *skl) 166 { 167 return NULL; 168 } 169 static inline void skl_debug_init_module(struct skl_debug *d, 170 struct snd_soc_dapm_widget *w, 171 struct skl_module_cfg *mconfig) 172 {} 173 #endif 174 175 #endif /* __SOUND_SOC_SKL_H */ 176