Revision tags: v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59 |
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#
8f0ccd59 |
| 13-Aug-2020 |
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> |
ASoC: Intel: Skylake: (cosmetic) align function parameters
Fix cppcheck warnings and align headers with code.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https:
ASoC: Intel: Skylake: (cosmetic) align function parameters
Fix cppcheck warnings and align headers with code.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200813200147.61990-22-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8 |
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#
36004c42 |
| 08-Aug-2019 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: large_config_get overhaul
LARGE_CONFIG_GET is mainly used to retrieve requested module parameters but it may also carry TX payload with them. Update its implementation to accou
ASoC: Intel: Skylake: large_config_get overhaul
LARGE_CONFIG_GET is mainly used to retrieve requested module parameters but it may also carry TX payload with them. Update its implementation to account for both TX and RX data. First reply.header carries total payload size within data_off_sizefield. Make use of reply.header to realloc returned buffer with correct size.
Failure of IPC request is permissive - error-payload may be returned, an informative data why GET for given param failed - and thus function should not collapse before entire processing is finished. Caller is responsible for checking returned payload and bytes parameters.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190808181549.12521-3-cezary.rojewski@intel.com Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3 |
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#
bcc2a2dc |
| 23-Jul-2019 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev struct
Skylake driver is divided into two modules: - snd_soc_skl - snd_soc_skl_ipc
and nothing would be wrong if not for the fact that both
ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev struct
Skylake driver is divided into two modules: - snd_soc_skl - snd_soc_skl_ipc
and nothing would be wrong if not for the fact that both cannot exist without one another. IPC module is not some kind of extension, as it is the case for snd_hda_ext_core which is separated from snd_hda_core - legacy hda interface. It's as much core Skylake module as snd_soc_skl is.
Statement backed up by existence of circular dependency between this two. To eliminate said problem, struct skl_sst has been created. From that very momment, Skylake has been plagued by header errors (incomplete structs, unknown references etc.) whenever something new is to be added or code is cleaned up.
As this design is being corrected, struct skl_sst is no longer needed, so combine it with struct skl. To avoid ambiguity when searching for skl stuff (struct skl *skl) it has also been renamed to skl_dev.
No functional changes.
Signed-off-by: Piotr Maziarz <piotrx.maziarz@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8 |
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#
47d7195d |
| 04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 490
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 490
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 13 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081205.608593891@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16 |
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#
fc9fdd61 |
| 12-Mar-2018 |
Sanyog Kale <sanyog.r.kale@intel.com> |
ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB download
In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable
ASoC: Intel: Skylake: Disable clock and power gating during FW/LIB download
In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable dynamic clock and power gating. In some scenarios, DMA may wait to accumulate more data and last chunk of data never gets completed if dynamic clock and power gating is kept enabled.
This patch adds support to disable/enable dynamic clock and power gating and use it during firmware and library download.
Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.15, v4.13.16, v4.14, v4.13.5, v4.13 |
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#
4bdb04f0 |
| 02-Aug-2017 |
Guneshwor Singh <guneshwor.o.singh@intel.com> |
ASoC: Intel: cnl: Unstatify common ipc functions
Common ipc functions can be reused for cnl, so make them non-static.
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Ko
ASoC: Intel: cnl: Unstatify common ipc functions
Common ipc functions can be reused for cnl, so make them non-static.
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f0a550a8 |
| 02-Aug-2017 |
Guneshwor Singh <guneshwor.o.singh@intel.com> |
ASoC: Intel: Skylake: Use num_core to allocate instead of macro
For different platforms, number of dsp cores can vary. So instead of creating array of size SKL_DSP_CORES_MAX, use num_core in dsp_ops
ASoC: Intel: Skylake: Use num_core to allocate instead of macro
For different platforms, number of dsp cores can vary. So instead of creating array of size SKL_DSP_CORES_MAX, use num_core in dsp_ops() of the respective platform to allocate core usage counts and states.
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13 |
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#
100e7f39 |
| 25-Apr-2017 |
Subhransu S. Prusty <subhransu.s.prusty@intel.com> |
ASoC: Intel: Skylake: Modify load_lib_ipc arguments for a nowait version
Kabylake uses code loader dma and wait on notification instead of ipc reply for load library ipc status. So modify the argume
ASoC: Intel: Skylake: Modify load_lib_ipc arguments for a nowait version
Kabylake uses code loader dma and wait on notification instead of ipc reply for load library ipc status. So modify the argument of skl_sst_ipc_load_library to check on flag to wait for ipc reply.
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6 |
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#
b26199ea |
| 24-Mar-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Rearrangement of code to cleanup SKL SST library
Skylake driver topology header/driver structure is referenced and used in SST library which creates circular dependency. Hence
ASoC: Intel: Skylake: Rearrangement of code to cleanup SKL SST library
Skylake driver topology header/driver structure is referenced and used in SST library which creates circular dependency. Hence the rearrangement.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.10.5, v4.10.4, v4.10.3 |
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#
b7d0254c |
| 13-Mar-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix module load when module size > DMA buffer size
When module size > DMA buffer size, driver copies first chunk and waits for the BDL complete interrupt. BDL complete interrup
ASoC: Intel: Skylake: Fix module load when module size > DMA buffer size
When module size > DMA buffer size, driver copies first chunk and waits for the BDL complete interrupt. BDL complete interrupt never occurs and wait time expires as module load IPC is not send to start the DMA from DSP.
To fix the above issue need to follow the below steps: 1. After copying the first chunk, send the module load IPC to start the DMA. 2. Wait for the BDL interrupt. Once interrupt is received, copy the next chunk. 3. Continue step 2 till all bytes are copied. 4. When all the bytes are copied (bytes_left = 0), wait for module load IPC response 5. Handled module load IPC response messages, check the load module IPC response and wake up the thread to complete module load.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
7bd86a30 |
| 13-Mar-2017 |
G Kranthi <gudishax.kranthikumar@intel.com> |
ASoC: Intel: Skylake: Remove get dsp_ops in cleanup routine
dsp ops is already set in init, so use this in cleanup routine instead of again retrieving it. Also constify struct skl_dsp_ops.
Signed-o
ASoC: Intel: Skylake: Remove get dsp_ops in cleanup routine
dsp ops is already set in init, so use this in cleanup routine instead of again retrieving it. Also constify struct skl_dsp_ops.
Signed-off-by: G Kranthi <gudishax.kranthikumar@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.10.2, v4.10.1, v4.10 |
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#
eee0e16f |
| 01-Jan-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Clean up manifest info
Instead of passing the topology manifest info directly to IPC library, define the manifest info in topology and use this in IPC Library. This will remove
ASoC: Intel: Skylake: Clean up manifest info
Instead of passing the topology manifest info directly to IPC library, define the manifest info in topology and use this in IPC Library. This will remove the dependency on topology interface definition with IPC library.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.9 |
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#
786e1c37 |
| 28-Nov-2016 |
Takashi Iwai <tiwai@suse.de> |
ASoC: intel: Replace kthread with work
The usage pattern of kthread worker in Intel SST drivers can be replaced gracefully with the normal workqueue, which is more light- weight and easier to manage
ASoC: intel: Replace kthread with work
The usage pattern of kthread worker in Intel SST drivers can be replaced gracefully with the normal workqueue, which is more light- weight and easier to manage in general. Let's do it.
While in the replacement, move the schedule_work() call inside the spinlock for excluding the race, too.
Signed-off-by: Takashi Iwai <tiwai@suse.de> Acked-by: Vinod Koul <vinod.koul@intel.com> Tested-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31 |
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#
a83e3b4c |
| 03-Nov-2016 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: Add D0i3 mode ref counting
For device opened/closed, we check the D0i3 capability for the device and invoke skl_tplg_d0i3_get/put, which counts the use case based on the mode s
ASoC: Intel: Skylake: Add D0i3 mode ref counting
For device opened/closed, we check the D0i3 capability for the device and invoke skl_tplg_d0i3_get/put, which counts the use case based on the mode supported.
These counters are then used to decide if the device can enter D0i3 mode of streaming or non-streaming or no D0i3.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8a0cb236 |
| 03-Nov-2016 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: Add support for LPMode
For D0i3, we need to tell DSP to run the pipelines in LP mode. This information is kept in topology and passed to driver as an attribute for pipe.
So ad
ASoC: Intel: Skylake: Add support for LPMode
For D0i3, we need to tell DSP to run the pipelines in LP mode. This information is kept in topology and passed to driver as an attribute for pipe.
So add a new tuple for lpmode and program the pipe based on value set.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5bb4cd46 |
| 03-Nov-2016 |
Jayachandran B <jayachandran.b@intel.com> |
ASoC: Intel: Skylake: Add D0iX callbacks
The driver needs two DSP callback, one to set D0i0 (active) and D0i3 (low-power) states.
Add these callbacks in dsp ops and implement them for broxton platf
ASoC: Intel: Skylake: Add D0iX callbacks
The driver needs two DSP callback, one to set D0i0 (active) and D0i3 (low-power) states.
Add these callbacks in dsp ops and implement them for broxton platforms.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
a26a3f53 |
| 03-Nov-2016 |
Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> |
ASoC: Intel: Skylake: Add support for programming D0i3C
To set the controller in D0i3 mode, the driver needs to set D0i3C register after DSP is quiesced. Since the D0iX entry/exit is done by IPC, ad
ASoC: Intel: Skylake: Add support for programming D0i3C
To set the controller in D0i3 mode, the driver needs to set D0i3C register after DSP is quiesced. Since the D0iX entry/exit is done by IPC, add this as callback so that it can be invoked from IPC module.
Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
41b7523f |
| 03-Nov-2016 |
Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> |
ASoC: Intel: Skylake: Add D0iX IPCs
The audio DSP supports intermediate power states between D0 and D3 states. These states are D0i0 and D0i3 states.
Collectively we refer these two states as D0iX
ASoC: Intel: Skylake: Add D0iX IPCs
The audio DSP supports intermediate power states between D0 and D3 states. These states are D0i0 and D0i3 states.
Collectively we refer these two states as D0iX states.
To set or wake up from these states, driver also needs to send an IPC "Set D0iX IPC" before doing anything else.
Add support for this new IPC messages.
Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16 |
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#
3d4006cd |
| 26-Jul-2016 |
Senthilnathan Veppur <senthilnathanx.veppur@intel.com> |
ASoC: Intel: Skylake: Add module processing domain support
A module can be scheduled in deferent processing domains in DSP. Topology specifies the module domain.
Signed-off-by: Senthilnathan Veppur
ASoC: Intel: Skylake: Add module processing domain support
A module can be scheduled in deferent processing domains in DSP. Topology specifies the module domain.
Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8d983be8 |
| 26-Jul-2016 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: Fix a comment style
While changing code notice bad comment style, so fix it up.
Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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20fb2fbd |
| 26-Jul-2016 |
Ramesh Babu <ramesh.babu@intel.com> |
ASoC: Intel: Skylake: Add library loading IPCs
DSP fw can have additional firmwares as libs. These libs can be loaded using message IPC_GLB_LOAD_LIBRARY.
Signed-off-by: Ramesh Babu <ramesh.babu@int
ASoC: Intel: Skylake: Add library loading IPCs
DSP fw can have additional firmwares as libs. These libs can be loaded using message IPC_GLB_LOAD_LIBRARY.
Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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15ecaba9 |
| 26-Jul-2016 |
Kranthi G <gudishax.kranthikumar@intel.com> |
ASoC: Intel: Skylake: add support for tplg manifest load
Topology manifest gives information about the libraries to be loaded. Implement the topology manifest load callback to get this.
Signed-off-
ASoC: Intel: Skylake: add support for tplg manifest load
Topology manifest gives information about the libraries to be loaded. Implement the topology manifest load callback to get this.
Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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78cdbbda |
| 26-Jul-2016 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: split fw and dsp initialization
The DSP instance creation also loads the firmware on DSPs. For library load the firmware names come from topology so can't be loaded at object c
ASoC: Intel: Skylake: split fw and dsp initialization
The DSP instance creation also loads the firmware on DSPs. For library load the firmware names come from topology so can't be loaded at object creation.
So split the firmware load and object creation. FW load is now called after topology init in platform probe.
Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14 |
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052f103c |
| 20-Jun-2016 |
Jayachandran B <jayachandran.b@intel.com> |
ASoC: Intel: Skylake: Add DSP muti-core infrastructure
The DSP can have more than one cores. In that case the secondary core has to be managed by the driver. This patch adds the changes to driver in
ASoC: Intel: Skylake: Add DSP muti-core infrastructure
The DSP can have more than one cores. In that case the secondary core has to be managed by the driver. This patch adds the changes to driver infrastructure to support multiple core.
A new object skl_dsp_cores is introduced to support multiple core. Helpers skl_dsp_get_core() skl_dsp_put_core() help to managed the cores.
Many of the power_up/down and DSP APIs take additional argument of core_id. The primary core, 0 is always powered up first and then on demand second core.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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1665c177 |
| 13-Jun-2016 |
Jayachandran B <jayachandran.b@intel.com> |
ASoC: Intel: Skylake: Enable firmware reload in suspend
Broxton DSP needs retains code loaded during runtime_pm cycles. But it looses that on suspend cycle, so on resume we need to download the firm
ASoC: Intel: Skylake: Enable firmware reload in suspend
Broxton DSP needs retains code loaded during runtime_pm cycles. But it looses that on suspend cycle, so on resume we need to download the firmware again.
This is done by adding a new flag and based on flag status, we download the firmware.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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