powerpc/44x: Enable 64bit (>= 4GB) memory size in Katmai dts

Additionally to increasing #size-cells to in the root node, we also
need to explicitly define the ranges property in the plb

powerpc/44x: Enable 64bit (>= 4GB) memory size in Katmai dts

Additionally to increasing #size-cells to in the root node, we also
need to explicitly define the ranges property in the plb node, because
of the different #size-cells between child and parent.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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ibm_newemac: Parameterize EMAC Multicast Match Handling

Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address

ibm_newemac: Parameterize EMAC Multicast Match Handling

Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.

As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.

The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.

This adds a new compatible device tree entry "emac4sync" and a new,
related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros
and inlines which supply the appropriate parameterized value based on
the presence or absence of the EMAC4SYNC feature.

The code has further been reworked where appropriate to use those macros
and inlines.

In addition, the register size passed to ioremap is now taken from the
device tree:

c4 for EMAC4SYNC cores
74 for EMAC4 cores
70 for EMAC cores

rather than sizeof (emac_regs).

Finally, the device trees have been updated with the appropriate compatible
entries and resource sizes.

This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

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[POWERPC] Convert remaining dts-v0 files to v1

At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts. This is potentially
co

[POWERPC] Convert remaining dts-v0 files to v1

At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts. This is potentially
confusing to people new to the dts format attempting to figure it out.

So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1. They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.

I have checked that this patch produces no changes to the resulting
dtb binaries.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Change dts files to support jumbo frames

This patch changes the "max-frame-size" property to 9000 for all gbit
enabled 4xx boards. All those ports generally support jumbo

[POWERPC] 4xx: Change dts files to support jumbo frames

This patch changes the "max-frame-size" property to 9000 for all gbit
enabled 4xx boards. All those ports generally support jumbo frames, so
let's give the user a chance to enable it.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Fix L1 cache size in katmai DTS

This patch changes the katmai (440SPe) L1 cache size to 32k. Some
whitespace issues are cleaned up too.

Signed-off-by: Stefan Roes

[POWERPC] 4xx: Fix L1 cache size in katmai DTS

This patch changes the katmai (440SPe) L1 cache size to 32k. Some
whitespace issues are cleaned up too.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Remove "i2c" and "xxmii-interface" device_types from dts

Remove all "i2c" and "xxmii-interface" (rgmii etc) device_type entries
from the 4xx dts files.

Signed-off

[POWERPC] 4xx: Remove "i2c" and "xxmii-interface" device_types from dts

Remove all "i2c" and "xxmii-interface" (rgmii etc) device_type entries
from the 4xx dts files.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Add aliases node to 4xx dts files

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

[POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility

Recent DTC versions disallow certain special characters in full paths without
being quoted with {}. That however breaks comp

[POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility

Recent DTC versions disallow certain special characters in full paths without
being quoted with {}. That however breaks compatibility with older DTC
versions. Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe

This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and

[POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe

This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and need special/
different initialization. The compatible node is changed to
"plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that
can be equipped with both PPC revisions like the AMCC Yucca.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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[POWERPC] 4xx: Base support for 440SPe "Katmai" eval board

This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).

Signed-o

[POWERPC] 4xx: Base support for 440SPe "Katmai" eval board

This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

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