1/* 2 * Device Tree Source for AMCC Katmai eval board 3 * 4 * Copyright (c) 2006, 2007 IBM Corp. 5 * Benjamin Herrenschmidt <benh@kernel.crashing.org> 6 * 7 * Copyright (c) 2006, 2007 IBM Corp. 8 * Josh Boyer <jwboyer@linux.vnet.ibm.com> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without 12 * any warranty of any kind, whether express or implied. 13 */ 14 15/ { 16 #address-cells = <2>; 17 #size-cells = <1>; 18 model = "amcc,katmai"; 19 compatible = "amcc,katmai"; 20 dcr-parent = <&/cpus/cpu@0>; 21 22 cpus { 23 #address-cells = <1>; 24 #size-cells = <0>; 25 26 cpu@0 { 27 device_type = "cpu"; 28 model = "PowerPC,440SPe"; 29 reg = <0>; 30 clock-frequency = <0>; /* Filled in by zImage */ 31 timebase-frequency = <0>; /* Filled in by zImage */ 32 i-cache-line-size = <20>; 33 d-cache-line-size = <20>; 34 i-cache-size = <20000>; 35 d-cache-size = <20000>; 36 dcr-controller; 37 dcr-access-method = "native"; 38 }; 39 }; 40 41 memory { 42 device_type = "memory"; 43 reg = <0 0 0>; /* Filled in by zImage */ 44 }; 45 46 UIC0: interrupt-controller0 { 47 compatible = "ibm,uic-440spe","ibm,uic"; 48 interrupt-controller; 49 cell-index = <0>; 50 dcr-reg = <0c0 009>; 51 #address-cells = <0>; 52 #size-cells = <0>; 53 #interrupt-cells = <2>; 54 }; 55 56 UIC1: interrupt-controller1 { 57 compatible = "ibm,uic-440spe","ibm,uic"; 58 interrupt-controller; 59 cell-index = <1>; 60 dcr-reg = <0d0 009>; 61 #address-cells = <0>; 62 #size-cells = <0>; 63 #interrupt-cells = <2>; 64 interrupts = <1e 4 1f 4>; /* cascade */ 65 interrupt-parent = <&UIC0>; 66 }; 67 68 UIC2: interrupt-controller2 { 69 compatible = "ibm,uic-440spe","ibm,uic"; 70 interrupt-controller; 71 cell-index = <2>; 72 dcr-reg = <0e0 009>; 73 #address-cells = <0>; 74 #size-cells = <0>; 75 #interrupt-cells = <2>; 76 interrupts = <a 4 b 4>; /* cascade */ 77 interrupt-parent = <&UIC0>; 78 }; 79 80 UIC3: interrupt-controller3 { 81 compatible = "ibm,uic-440spe","ibm,uic"; 82 interrupt-controller; 83 cell-index = <3>; 84 dcr-reg = <0f0 009>; 85 #address-cells = <0>; 86 #size-cells = <0>; 87 #interrupt-cells = <2>; 88 interrupts = <10 4 11 4>; /* cascade */ 89 interrupt-parent = <&UIC0>; 90 }; 91 92 SDR0: sdr { 93 compatible = "ibm,sdr-440spe"; 94 dcr-reg = <00e 002>; 95 }; 96 97 CPR0: cpr { 98 compatible = "ibm,cpr-440spe"; 99 dcr-reg = <00c 002>; 100 }; 101 102 plb { 103 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; 104 #address-cells = <2>; 105 #size-cells = <1>; 106 ranges; 107 clock-frequency = <0>; /* Filled in by zImage */ 108 109 SDRAM0: sdram { 110 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; 111 dcr-reg = <010 2>; 112 }; 113 114 MAL0: mcmal { 115 compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; 116 dcr-reg = <180 62>; 117 num-tx-chans = <2>; 118 num-rx-chans = <1>; 119 interrupt-parent = <&MAL0>; 120 interrupts = <0 1 2 3 4>; 121 #interrupt-cells = <1>; 122 #address-cells = <0>; 123 #size-cells = <0>; 124 interrupt-map = </*TXEOB*/ 0 &UIC1 6 4 125 /*RXEOB*/ 1 &UIC1 7 4 126 /*SERR*/ 2 &UIC1 1 4 127 /*TXDE*/ 3 &UIC1 2 4 128 /*RXDE*/ 4 &UIC1 3 4>; 129 }; 130 131 POB0: opb { 132 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; 133 #address-cells = <1>; 134 #size-cells = <1>; 135 ranges = <00000000 4 e0000000 20000000>; 136 clock-frequency = <0>; /* Filled in by zImage */ 137 138 EBC0: ebc { 139 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; 140 dcr-reg = <012 2>; 141 #address-cells = <2>; 142 #size-cells = <1>; 143 clock-frequency = <0>; /* Filled in by zImage */ 144 interrupts = <5 1>; 145 interrupt-parent = <&UIC1>; 146 }; 147 148 UART0: serial@10000200 { 149 device_type = "serial"; 150 compatible = "ns16550"; 151 reg = <10000200 8>; 152 virtual-reg = <a0000200>; 153 clock-frequency = <0>; /* Filled in by zImage */ 154 current-speed = <1c200>; 155 interrupt-parent = <&UIC0>; 156 interrupts = <0 4>; 157 }; 158 159 UART1: serial@10000300 { 160 device_type = "serial"; 161 compatible = "ns16550"; 162 reg = <10000300 8>; 163 virtual-reg = <a0000300>; 164 clock-frequency = <0>; 165 current-speed = <0>; 166 interrupt-parent = <&UIC0>; 167 interrupts = <1 4>; 168 }; 169 170 171 UART2: serial@10000600 { 172 device_type = "serial"; 173 compatible = "ns16550"; 174 reg = <10000600 8>; 175 virtual-reg = <a0000600>; 176 clock-frequency = <0>; 177 current-speed = <0>; 178 interrupt-parent = <&UIC1>; 179 interrupts = <5 4>; 180 }; 181 182 IIC0: i2c@10000400 { 183 device_type = "i2c"; 184 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 185 reg = <10000400 14>; 186 interrupt-parent = <&UIC0>; 187 interrupts = <2 4>; 188 }; 189 190 IIC1: i2c@10000500 { 191 device_type = "i2c"; 192 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 193 reg = <10000500 14>; 194 interrupt-parent = <&UIC0>; 195 interrupts = <3 4>; 196 }; 197 198 EMAC0: ethernet@10000800 { 199 linux,network-index = <0>; 200 device_type = "network"; 201 compatible = "ibm,emac-440spe", "ibm,emac4"; 202 interrupt-parent = <&UIC1>; 203 interrupts = <1c 4 1d 4>; 204 reg = <10000800 70>; 205 local-mac-address = [000000000000]; 206 mal-device = <&MAL0>; 207 mal-tx-channel = <0>; 208 mal-rx-channel = <0>; 209 cell-index = <0>; 210 max-frame-size = <5dc>; 211 rx-fifo-size = <1000>; 212 tx-fifo-size = <800>; 213 phy-mode = "gmii"; 214 phy-map = <00000000>; 215 has-inverted-stacr-oc; 216 has-new-stacr-staopc; 217 }; 218 }; 219 220 PCIX0: pci@c0ec00000 { 221 device_type = "pci"; 222 #interrupt-cells = <1>; 223 #size-cells = <2>; 224 #address-cells = <3>; 225 compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; 226 primary; 227 large-inbound-windows; 228 enable-msi-hole; 229 reg = <c 0ec00000 8 /* Config space access */ 230 0 0 0 /* no IACK cycles */ 231 c 0ed00000 4 /* Special cycles */ 232 c 0ec80000 100 /* Internal registers */ 233 c 0ec80100 fc>; /* Internal messaging registers */ 234 235 /* Outbound ranges, one memory and one IO, 236 * later cannot be changed 237 */ 238 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 239 01000000 0 00000000 0000000c 08000000 0 00010000>; 240 241 /* Inbound 2GB range starting at 0 */ 242 dma-ranges = <42000000 0 0 0 0 0 80000000>; 243 244 /* This drives busses 0 to 0xf */ 245 bus-range = <0 f>; 246 247 /* 248 * On Katmai, the following PCI-X interrupts signals 249 * have to be enabled via jumpers (only INTA is 250 * enabled per default): 251 * 252 * INTB: J3: 1-2 253 * INTC: J2: 1-2 254 * INTD: J1: 1-2 255 */ 256 interrupt-map-mask = <f800 0 0 7>; 257 interrupt-map = < 258 /* IDSEL 1 */ 259 0800 0 0 1 &UIC1 14 8 260 0800 0 0 2 &UIC1 13 8 261 0800 0 0 3 &UIC1 12 8 262 0800 0 0 4 &UIC1 11 8 263 >; 264 }; 265 266 PCIE0: pciex@d00000000 { 267 device_type = "pci"; 268 #interrupt-cells = <1>; 269 #size-cells = <2>; 270 #address-cells = <3>; 271 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 272 primary; 273 port = <0>; /* port number */ 274 reg = <d 00000000 20000000 /* Config space access */ 275 c 10000000 00001000>; /* Registers */ 276 dcr-reg = <100 020>; 277 sdr-base = <300>; 278 279 /* Outbound ranges, one memory and one IO, 280 * later cannot be changed 281 */ 282 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 283 01000000 0 00000000 0000000f 80000000 0 00010000>; 284 285 /* Inbound 2GB range starting at 0 */ 286 dma-ranges = <42000000 0 0 0 0 0 80000000>; 287 288 /* This drives busses 10 to 0x1f */ 289 bus-range = <10 1f>; 290 291 /* Legacy interrupts (note the weird polarity, the bridge seems 292 * to invert PCIe legacy interrupts). 293 * We are de-swizzling here because the numbers are actually for 294 * port of the root complex virtual P2P bridge. But I want 295 * to avoid putting a node for it in the tree, so the numbers 296 * below are basically de-swizzled numbers. 297 * The real slot is on idsel 0, so the swizzling is 1:1 298 */ 299 interrupt-map-mask = <0000 0 0 7>; 300 interrupt-map = < 301 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ 302 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ 303 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ 304 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; 305 }; 306 307 PCIE1: pciex@d20000000 { 308 device_type = "pci"; 309 #interrupt-cells = <1>; 310 #size-cells = <2>; 311 #address-cells = <3>; 312 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 313 primary; 314 port = <1>; /* port number */ 315 reg = <d 20000000 20000000 /* Config space access */ 316 c 10001000 00001000>; /* Registers */ 317 dcr-reg = <120 020>; 318 sdr-base = <340>; 319 320 /* Outbound ranges, one memory and one IO, 321 * later cannot be changed 322 */ 323 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 324 01000000 0 00000000 0000000f 80010000 0 00010000>; 325 326 /* Inbound 2GB range starting at 0 */ 327 dma-ranges = <42000000 0 0 0 0 0 80000000>; 328 329 /* This drives busses 10 to 0x1f */ 330 bus-range = <20 2f>; 331 332 /* Legacy interrupts (note the weird polarity, the bridge seems 333 * to invert PCIe legacy interrupts). 334 * We are de-swizzling here because the numbers are actually for 335 * port of the root complex virtual P2P bridge. But I want 336 * to avoid putting a node for it in the tree, so the numbers 337 * below are basically de-swizzled numbers. 338 * The real slot is on idsel 0, so the swizzling is 1:1 339 */ 340 interrupt-map-mask = <0000 0 0 7>; 341 interrupt-map = < 342 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ 343 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ 344 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ 345 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; 346 }; 347 348 PCIE2: pciex@d40000000 { 349 device_type = "pci"; 350 #interrupt-cells = <1>; 351 #size-cells = <2>; 352 #address-cells = <3>; 353 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 354 primary; 355 port = <2>; /* port number */ 356 reg = <d 40000000 20000000 /* Config space access */ 357 c 10002000 00001000>; /* Registers */ 358 dcr-reg = <140 020>; 359 sdr-base = <370>; 360 361 /* Outbound ranges, one memory and one IO, 362 * later cannot be changed 363 */ 364 ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 365 01000000 0 00000000 0000000f 80020000 0 00010000>; 366 367 /* Inbound 2GB range starting at 0 */ 368 dma-ranges = <42000000 0 0 0 0 0 80000000>; 369 370 /* This drives busses 10 to 0x1f */ 371 bus-range = <30 3f>; 372 373 /* Legacy interrupts (note the weird polarity, the bridge seems 374 * to invert PCIe legacy interrupts). 375 * We are de-swizzling here because the numbers are actually for 376 * port of the root complex virtual P2P bridge. But I want 377 * to avoid putting a node for it in the tree, so the numbers 378 * below are basically de-swizzled numbers. 379 * The real slot is on idsel 0, so the swizzling is 1:1 380 */ 381 interrupt-map-mask = <0000 0 0 7>; 382 interrupt-map = < 383 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ 384 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ 385 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ 386 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; 387 }; 388 }; 389 390 chosen { 391 linux,stdout-path = "/plb/opb/serial@10000200"; 392 }; 393}; 394