Revision tags: v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5, v3.13-rc4, v3.13-rc3, v3.13-rc2, v3.13-rc1, v3.12, v3.12-rc7, v3.12-rc6, v3.12-rc5, v3.12-rc4, v3.12-rc3 |
|
#
03aa254f |
| 26-Sep-2013 |
Hongbo Zhang <hongbo.zhang@freescale.com> |
DMA: Freescale: Add new 8-channel DMA engine device tree nodes Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds the device tree nodes for them. Sig
DMA: Freescale: Add new 8-channel DMA engine device tree nodes Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds the device tree nodes for them. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
show more ...
|
Revision tags: v3.12-rc2, v3.12-rc1, v3.11, v3.11-rc7, v3.11-rc6, v3.11-rc5, v3.11-rc4, v3.11-rc3, v3.11-rc2, v3.11-rc1, v3.10, v3.10-rc7 |
|
#
6d854acd |
| 21-Jun-2013 |
Minghuan Lian <Minghuan.Lian@freescale.com> |
powerpc/dts: add MPIC v4.3 dts node For the latest platform T4 and B4, MPIC controller has been updated to v4.3. This patch adds a new file to describe the latest MPIC. The MSI block
powerpc/dts: add MPIC v4.3 dts node For the latest platform T4 and B4, MPIC controller has been updated to v4.3. This patch adds a new file to describe the latest MPIC. The MSI blocks number is increased to four, the registers number of each block is increased to sixteen. MSIIR1 has been added to access these sixteen MSI registers. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
show more ...
|
Revision tags: v3.10-rc6, v3.10-rc5, v3.10-rc4, v3.10-rc3, v3.10-rc2, v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7 |
|
#
9e2ecdbb |
| 14-Apr-2013 |
Kevin Hao <haokexin@gmail.com> |
powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4 The reg property in the pci bridge device node is used to bind this device node to the pci bridge device. Then al
powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4 The reg property in the pci bridge device node is used to bind this device node to the pci bridge device. Then all the pci devices under this bridge could use the interrupt maps defined in this device node to do the irq translation. So if this property is missed, the pci traditional irq mechanism will not work. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
|
Revision tags: v3.9-rc6 |
|
#
9ac8f50a |
| 05-Apr-2013 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/fsl-booke: Minor fixes to T4240 Si device tree * Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: Kumar Ga
powerpc/fsl-booke: Minor fixes to T4240 Si device tree * Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
|
Revision tags: v3.9-rc5, v3.9-rc4 |
|
#
3dfd44c5 |
| 18-Mar-2013 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/fsl-booke: Update T4240 device config node in device tree As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to re
powerpc/fsl-booke: Update T4240 device config node in device tree As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to reflect this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
|
Revision tags: v3.9-rc3, v3.9-rc2 |
|
#
8c33de98 |
| 05-Mar-2013 |
Stephen George <Stephen.George@freescale.com> |
powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IP Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crash
powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IP Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
|
Revision tags: v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5, v3.7-rc4, v3.7-rc3, v3.7-rc2, v3.7-rc1, v3.6, v3.6-rc7, v3.6-rc6, v3.6-rc5, v3.6-rc4, v3.6-rc3, v3.6-rc2, v3.6-rc1, v3.5, v3.5-rc7, v3.5-rc6, v3.5-rc5, v3.5-rc4, v3.5-rc3, v3.5-rc2, v3.5-rc1, v3.4, v3.4-rc7, v3.4-rc6, v3.4-rc5, v3.4-rc4, v3.4-rc3, v3.4-rc2, v3.4-rc1, v3.3, v3.3-rc7, v3.3-rc6, v3.3-rc5, v3.3-rc4, v3.3-rc3, v3.3-rc2, v3.3-rc1, v3.2, v3.2-rc7, v3.2-rc6, v3.2-rc5 |
|
#
3d741971 |
| 07-Dec-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/fsl-booke: Add initial silicon device tree for T4240 Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAM
powerpc/fsl-booke: Add initial silicon device tree for T4240 Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
|