1/* 2 * T4240 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2012 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&ifc { 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 39 interrupts = <25 2 0 0>; 40}; 41 42/* controller at 0x240000 */ 43&pci0 { 44 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 45 device_type = "pci"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 interrupts = <20 2 0 0>; 50 pcie@0 { 51 #interrupt-cells = <1>; 52 #size-cells = <2>; 53 #address-cells = <3>; 54 device_type = "pci"; 55 interrupts = <20 2 0 0>; 56 interrupt-map-mask = <0xf800 0 0 7>; 57 interrupt-map = < 58 /* IDSEL 0x0 */ 59 0000 0 0 1 &mpic 40 1 0 0 60 0000 0 0 2 &mpic 1 1 0 0 61 0000 0 0 3 &mpic 2 1 0 0 62 0000 0 0 4 &mpic 3 1 0 0 63 >; 64 }; 65}; 66 67/* controller at 0x250000 */ 68&pci1 { 69 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 70 device_type = "pci"; 71 #size-cells = <2>; 72 #address-cells = <3>; 73 bus-range = <0 0xff>; 74 interrupts = <21 2 0 0>; 75 pcie@0 { 76 #interrupt-cells = <1>; 77 #size-cells = <2>; 78 #address-cells = <3>; 79 device_type = "pci"; 80 interrupts = <21 2 0 0>; 81 interrupt-map-mask = <0xf800 0 0 7>; 82 interrupt-map = < 83 /* IDSEL 0x0 */ 84 0000 0 0 1 &mpic 41 1 0 0 85 0000 0 0 2 &mpic 5 1 0 0 86 0000 0 0 3 &mpic 6 1 0 0 87 0000 0 0 4 &mpic 7 1 0 0 88 >; 89 }; 90}; 91 92/* controller at 0x260000 */ 93&pci2 { 94 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 95 device_type = "pci"; 96 #size-cells = <2>; 97 #address-cells = <3>; 98 bus-range = <0x0 0xff>; 99 interrupts = <22 2 0 0>; 100 pcie@0 { 101 #interrupt-cells = <1>; 102 #size-cells = <2>; 103 #address-cells = <3>; 104 device_type = "pci"; 105 interrupts = <22 2 0 0>; 106 interrupt-map-mask = <0xf800 0 0 7>; 107 interrupt-map = < 108 /* IDSEL 0x0 */ 109 0000 0 0 1 &mpic 42 1 0 0 110 0000 0 0 2 &mpic 9 1 0 0 111 0000 0 0 3 &mpic 10 1 0 0 112 0000 0 0 4 &mpic 11 1 0 0 113 >; 114 }; 115}; 116 117/* controller at 0x270000 */ 118&pci3 { 119 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 120 device_type = "pci"; 121 #size-cells = <2>; 122 #address-cells = <3>; 123 bus-range = <0x0 0xff>; 124 interrupts = <23 2 0 0>; 125 pcie@0 { 126 #interrupt-cells = <1>; 127 #size-cells = <2>; 128 #address-cells = <3>; 129 device_type = "pci"; 130 interrupts = <23 2 0 0>; 131 interrupt-map-mask = <0xf800 0 0 7>; 132 interrupt-map = < 133 /* IDSEL 0x0 */ 134 0000 0 0 1 &mpic 43 1 0 0 135 0000 0 0 2 &mpic 0 1 0 0 136 0000 0 0 3 &mpic 4 1 0 0 137 0000 0 0 4 &mpic 8 1 0 0 138 >; 139 }; 140}; 141 142&rio { 143 compatible = "fsl,srio"; 144 interrupts = <16 2 1 11>; 145 #address-cells = <2>; 146 #size-cells = <2>; 147 ranges; 148 149 port1 { 150 #address-cells = <2>; 151 #size-cells = <2>; 152 cell-index = <1>; 153 }; 154 155 port2 { 156 #address-cells = <2>; 157 #size-cells = <2>; 158 cell-index = <2>; 159 }; 160}; 161 162&dcsr { 163 #address-cells = <1>; 164 #size-cells = <1>; 165 compatible = "fsl,dcsr", "simple-bus"; 166 167 dcsr-epu@0 { 168 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu"; 169 interrupts = <52 2 0 0 170 84 2 0 0 171 85 2 0 0 172 94 2 0 0 173 95 2 0 0>; 174 reg = <0x0 0x1000>; 175 }; 176 dcsr-npc { 177 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc"; 178 reg = <0x1000 0x1000 0x1002000 0x10000>; 179 }; 180 dcsr-nxc@2000 { 181 compatible = "fsl,dcsr-nxc"; 182 reg = <0x2000 0x1000>; 183 }; 184 dcsr-corenet { 185 compatible = "fsl,dcsr-corenet"; 186 reg = <0x8000 0x1000 0x1A000 0x1000>; 187 }; 188 dcsr-dpaa@9000 { 189 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa"; 190 reg = <0x9000 0x1000>; 191 }; 192 dcsr-ocn@11000 { 193 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn"; 194 reg = <0x11000 0x1000>; 195 }; 196 dcsr-ddr@12000 { 197 compatible = "fsl,dcsr-ddr"; 198 dev-handle = <&ddr1>; 199 reg = <0x12000 0x1000>; 200 }; 201 dcsr-ddr@13000 { 202 compatible = "fsl,dcsr-ddr"; 203 dev-handle = <&ddr2>; 204 reg = <0x13000 0x1000>; 205 }; 206 dcsr-ddr@14000 { 207 compatible = "fsl,dcsr-ddr"; 208 dev-handle = <&ddr3>; 209 reg = <0x14000 0x1000>; 210 }; 211 dcsr-nal@18000 { 212 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal"; 213 reg = <0x18000 0x1000>; 214 }; 215 dcsr-rcpm@22000 { 216 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm"; 217 reg = <0x22000 0x1000>; 218 }; 219 dcsr-snpc@30000 { 220 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 221 reg = <0x30000 0x1000 0x1022000 0x10000>; 222 }; 223 dcsr-snpc@31000 { 224 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 225 reg = <0x31000 0x1000 0x1042000 0x10000>; 226 }; 227 dcsr-snpc@32000 { 228 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc"; 229 reg = <0x32000 0x1000 0x1062000 0x10000>; 230 }; 231 dcsr-cpu-sb-proxy@100000 { 232 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 233 cpu-handle = <&cpu0>; 234 reg = <0x100000 0x1000 0x101000 0x1000>; 235 }; 236 dcsr-cpu-sb-proxy@108000 { 237 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 238 cpu-handle = <&cpu1>; 239 reg = <0x108000 0x1000 0x109000 0x1000>; 240 }; 241 dcsr-cpu-sb-proxy@110000 { 242 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 243 cpu-handle = <&cpu2>; 244 reg = <0x110000 0x1000 0x111000 0x1000>; 245 }; 246 dcsr-cpu-sb-proxy@118000 { 247 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 248 cpu-handle = <&cpu3>; 249 reg = <0x118000 0x1000 0x119000 0x1000>; 250 }; 251 dcsr-cpu-sb-proxy@120000 { 252 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 253 cpu-handle = <&cpu4>; 254 reg = <0x120000 0x1000 0x121000 0x1000>; 255 }; 256 dcsr-cpu-sb-proxy@128000 { 257 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 258 cpu-handle = <&cpu5>; 259 reg = <0x128000 0x1000 0x129000 0x1000>; 260 }; 261 dcsr-cpu-sb-proxy@130000 { 262 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 263 cpu-handle = <&cpu6>; 264 reg = <0x130000 0x1000 0x131000 0x1000>; 265 }; 266 dcsr-cpu-sb-proxy@138000 { 267 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 268 cpu-handle = <&cpu7>; 269 reg = <0x138000 0x1000 0x139000 0x1000>; 270 }; 271 dcsr-cpu-sb-proxy@140000 { 272 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 273 cpu-handle = <&cpu8>; 274 reg = <0x140000 0x1000 0x141000 0x1000>; 275 }; 276 dcsr-cpu-sb-proxy@148000 { 277 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 278 cpu-handle = <&cpu9>; 279 reg = <0x148000 0x1000 0x149000 0x1000>; 280 }; 281 dcsr-cpu-sb-proxy@150000 { 282 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 283 cpu-handle = <&cpu10>; 284 reg = <0x150000 0x1000 0x151000 0x1000>; 285 }; 286 dcsr-cpu-sb-proxy@158000 { 287 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 288 cpu-handle = <&cpu11>; 289 reg = <0x158000 0x1000 0x159000 0x1000>; 290 }; 291}; 292 293&soc { 294 #address-cells = <1>; 295 #size-cells = <1>; 296 device_type = "soc"; 297 compatible = "simple-bus"; 298 299 soc-sram-error { 300 compatible = "fsl,soc-sram-error"; 301 interrupts = <16 2 1 29>; 302 }; 303 304 corenet-law@0 { 305 compatible = "fsl,corenet-law"; 306 reg = <0x0 0x1000>; 307 fsl,num-laws = <32>; 308 }; 309 310 ddr1: memory-controller@8000 { 311 compatible = "fsl,qoriq-memory-controller-v4.7", 312 "fsl,qoriq-memory-controller"; 313 reg = <0x8000 0x1000>; 314 interrupts = <16 2 1 23>; 315 }; 316 317 ddr2: memory-controller@9000 { 318 compatible = "fsl,qoriq-memory-controller-v4.7", 319 "fsl,qoriq-memory-controller"; 320 reg = <0x9000 0x1000>; 321 interrupts = <16 2 1 22>; 322 }; 323 324 ddr3: memory-controller@a000 { 325 compatible = "fsl,qoriq-memory-controller-v4.7", 326 "fsl,qoriq-memory-controller"; 327 reg = <0xa000 0x1000>; 328 interrupts = <16 2 1 21>; 329 }; 330 331 cpc: l3-cache-controller@10000 { 332 compatible = "fsl,t4240-l3-cache-controller", "cache"; 333 reg = <0x10000 0x1000 334 0x11000 0x1000 335 0x12000 0x1000>; 336 interrupts = <16 2 1 27 337 16 2 1 26 338 16 2 1 25>; 339 }; 340 341 corenet-cf@18000 { 342 compatible = "fsl,corenet-cf"; 343 reg = <0x18000 0x1000>; 344 interrupts = <16 2 1 31>; 345 fsl,ccf-num-csdids = <32>; 346 fsl,ccf-num-snoopids = <32>; 347 }; 348 349 iommu@20000 { 350 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 351 reg = <0x20000 0x6000>; 352 interrupts = < 353 24 2 0 0 354 16 2 1 30>; 355 }; 356 357/include/ "qoriq-mpic.dtsi" 358 359 guts: global-utilities@e0000 { 360 compatible = "fsl,t4240-device-config"; 361 reg = <0xe0000 0xe00>; 362 fsl,has-rstcr; 363 fsl,liodn-bits = <12>; 364 }; 365 366 clockgen: global-utilities@e1000 { 367 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2"; 368 reg = <0xe1000 0x1000>; 369 }; 370 371 rcpm: global-utilities@e2000 { 372 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2"; 373 reg = <0xe2000 0x1000>; 374 }; 375 376 sfp: sfp@e8000 { 377 compatible = "fsl,t4240-sfp"; 378 reg = <0xe8000 0x1000>; 379 }; 380 381 serdes: serdes@ea000 { 382 compatible = "fsl,t4240-serdes"; 383 reg = <0xea000 0x4000>; 384 }; 385 386/include/ "qoriq-dma-0.dtsi" 387/include/ "qoriq-dma-1.dtsi" 388 389/include/ "qoriq-espi-0.dtsi" 390 spi@110000 { 391 fsl,espi-num-chipselects = <4>; 392 }; 393 394/include/ "qoriq-esdhc-0.dtsi" 395 sdhc@114000 { 396 compatible = "fsl,t4240-esdhc", "fsl,esdhc"; 397 sdhci,auto-cmd12; 398 }; 399/include/ "qoriq-i2c-0.dtsi" 400/include/ "qoriq-i2c-1.dtsi" 401/include/ "qoriq-duart-0.dtsi" 402/include/ "qoriq-duart-1.dtsi" 403/include/ "qoriq-gpio-0.dtsi" 404/include/ "qoriq-gpio-1.dtsi" 405/include/ "qoriq-gpio-2.dtsi" 406/include/ "qoriq-gpio-3.dtsi" 407/include/ "qoriq-usb2-mph-0.dtsi" 408 usb0: usb@210000 { 409 compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph"; 410 phy_type = "utmi"; 411 port0; 412 }; 413/include/ "qoriq-usb2-dr-0.dtsi" 414 usb1: usb@211000 { 415 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr"; 416 dr_mode = "host"; 417 phy_type = "utmi"; 418 }; 419/include/ "qoriq-sata2-0.dtsi" 420/include/ "qoriq-sata2-1.dtsi" 421/include/ "qoriq-sec5.0-0.dtsi" 422 423 L2_1: l2-cache-controller@c20000 { 424 compatible = "fsl,t4240-l2-cache-controller"; 425 reg = <0xc20000 0x40000>; 426 next-level-cache = <&cpc>; 427 }; 428 L2_2: l2-cache-controller@c60000 { 429 compatible = "fsl,t4240-l2-cache-controller"; 430 reg = <0xc60000 0x40000>; 431 next-level-cache = <&cpc>; 432 }; 433 L2_3: l2-cache-controller@ca0000 { 434 compatible = "fsl,t4240-l2-cache-controller"; 435 reg = <0xca0000 0x40000>; 436 next-level-cache = <&cpc>; 437 }; 438}; 439