Revision tags: v6.6.25, v6.6.24, v6.6.23 |
|
#
ddca1e4f |
| 13-Feb-2024 |
Judith Mendez <jm@ti.com> |
arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC
[ Upstream commit 379c7752bbd0e81654544a896dd19c19ebb6faba ]
Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Ta
arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC
[ Upstream commit 379c7752bbd0e81654544a896dd19c19ebb6faba ]
Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1.
[0] https://www.ti.com/lit/ds/symlink/am6442.pdf
Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-5-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
Revision tags: v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2 |
|
#
b0e4672f |
| 17-Nov-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable SDHCI nodes at the board level
[ Upstream commit 3b6345e3fcf4c93a79f396121cd0e6f98f04da13 ]
SDHCI nodes defined in the top-level AM64 SoC dtsi files are incomplete a
arm64: dts: ti: k3-am64: Enable SDHCI nodes at the board level
[ Upstream commit 3b6345e3fcf4c93a79f396121cd0e6f98f04da13 ]
SDHCI nodes defined in the top-level AM64 SoC dtsi files are incomplete and will not be functional unless they are extended.
As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231117163339.89952-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com> Stable-dep-of: 379c7752bbd0 ("arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC") Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
Revision tags: v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45 |
|
#
bcd8a3f2 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmu
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information.
Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-14-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
#
cd9f6b32 |
| 09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level
OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux an
arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level
OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information.
As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-8-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
Revision tags: v6.1.44, v6.1.43 |
|
#
f6a5b651 |
| 02-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3: Fix epwm_tbclk node name to generic name
The name "clock" is not allowed for nodes, use "clock-controller" to remove the DTS check warning.
Signed-off-by: Andrew Davis <afd@ti.c
arm64: dts: ti: k3: Fix epwm_tbclk node name to generic name
The name "clock" is not allowed for nodes, use "clock-controller" to remove the DTS check warning.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230802174521.236255-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
#
a57ba56b |
| 02-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Merge the two main_conf nodes
There are two nodes representing the same register space, this looks to have been created by some merge or copy/paste error. Remove the second
arm64: dts: ti: k3-am64: Merge the two main_conf nodes
There are two nodes representing the same register space, this looks to have been created by some merge or copy/paste error. Remove the second instance of this node and move its children into the first instance.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230802174521.236255-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
|
#
2a7cc7be |
| 13-Jul-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: Fix compatible of ti,*-ehrpwm-tbclk
TI EHRPWM compatible is just ti,*-ehrpwm-tbclk without needing a syscon compatibility.
Fixes the following dtbs_check warnings: compatible: [''t
arm64: dts: ti: Fix compatible of ti,*-ehrpwm-tbclk
TI EHRPWM compatible is just ti,*-ehrpwm-tbclk without needing a syscon compatibility.
Fixes the following dtbs_check warnings: compatible: [''ti,am654-ehrpwm-tbclk, 'syscon'] is too long compatible: ['ti,am64-epwm-tbclk', 'syscon'] is too long compatible: ['ti,am62-epwm-tbclk', 'syscon'] is too long
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230713184759.3336536-1-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
Revision tags: v6.1.38 |
|
#
48a498a2 |
| 05-Jul-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: ti: add missing space before {
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechn
arm64: dts: ti: add missing space before {
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20230705145755.292927-2-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
show more ...
|
Revision tags: v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32 |
|
#
f049b541 |
| 30-May-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-am64: Add ESM support
Add Error Signaling Module (ESM) instances in MCU and MAIN domains.
Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230530185335
arm64: dts: ti: k3-am64: Add ESM support
Add Error Signaling Module (ESM) instances in MCU and MAIN domains.
Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230530185335.79942-3-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
show more ...
|
#
27f98f3e |
| 01-Jun-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Only set UART baud for used ports
As the binding for "current-speed" states, this should only be used when the baud rate of an attached device cannot be detected. This is th
arm64: dts: ti: k3-am64: Only set UART baud for used ports
As the binding for "current-speed" states, this should only be used when the baud rate of an attached device cannot be detected. This is the case for our attached on-board USB-to-UART converter used for early kernel console. For all other unconnected/disabled ports this can be configured in userspace later, DT is not the place for device configuration, especially when there are already standard ways to set serial baud in userspace.
Remove setting baud for all disabled serial ports and move setting it for the couple enabled ports down into the board files.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230601184933.358731-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
show more ...
|
Revision tags: v6.1.31, v6.1.30, v6.1.29 |
|
#
91f983ff |
| 15-May-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable Mailbox nodes at the board level
Mailbox nodes defined in the top-level AM64x SoC dtsi files are incomplete and may not be functional unless they are extended with a
arm64: dts: ti: k3-am64: Enable Mailbox nodes at the board level
Mailbox nodes defined in the top-level AM64x SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor.
As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information.
Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230515172137.474626-4-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
show more ...
|
Revision tags: v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23 |
|
#
96135297 |
| 05-Apr-2023 |
Bryan Brattlof <bb@ti.com> |
arm64: dts: ti: k3-am64-main: add VTM node
The am64x supports a single VTM module which is located in the main domain with two associated temperature monitors located at different hot spots on the d
arm64: dts: ti: k3-am64-main: add VTM node
The am64x supports a single VTM module which is located in the main domain with two associated temperature monitors located at different hot spots on the die.
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230405215328.3755561-2-bb@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
show more ...
|
#
9972b457 |
| 14-Apr-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-am64: Add general purpose timers
There are 11 general purpose timers on am64 that can be used for things like PWM using pwm-omap-dmtimer driver. There are also additional four tim
arm64: dts: ti: k3-am64: Add general purpose timers
There are 11 general purpose timers on am64 that can be used for things like PWM using pwm-omap-dmtimer driver. There are also additional four timers in the MCU domain that do not have interrupts routable for Linux.
We configure the timers with the 25 MHz input clock by default as the 32.768 kHz clock may not be wired on the device. We leave the MCU domain timers clock mux unconfigured, and mark the MCU domain timers reserved. The MCU domain timers are likely reserved by the software for the ESM module.
Compared to am65, the timers on am64 do not have a dedicated IO mux for the timers. On am62, the timers have different interrupts, clocks and power domains compared to am65, and the MCU timers are at a different IO address. Compared to AM62, the AM64 times have different clocks and count in main domain are different as well.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230414073328.381336-2-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
show more ...
|
Revision tags: v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78 |
|
#
c1e56c82 |
| 07-Nov-2022 |
Jayesh Choudhary <j-choudhary@ti.com> |
arm64: dts: ti: k3-am64-main: Drop RNG clock
The x1-clk used by trng submodule comes directly from the system clock after a fixed divider. It is always running and has a fixed frequency that cannot
arm64: dts: ti: k3-am64-main: Drop RNG clock
The x1-clk used by trng submodule comes directly from the system clock after a fixed divider. It is always running and has a fixed frequency that cannot be changed, making it uncontrollable. Hence this property should be dropped from the rng node.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20221107110607.59216-4-j-choudhary@ti.com
show more ...
|
#
81685b3d |
| 15-Nov-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: ti: Trim addresses to 8 digits
Hex numbers in addresses and sizes should be rather eight digits, not nine. Drop leading zeros. No functional change (same DTB).
Signed-off-by: Krzyszto
arm64: dts: ti: Trim addresses to 8 digits
Hex numbers in addresses and sizes should be rather eight digits, not nine. Drop leading zeros. No functional change (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20221115105044.95225-1-krzysztof.kozlowski@linaro.org
show more ...
|
Revision tags: v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4 |
|
#
e5bad300 |
| 24-Oct-2022 |
Matt Ranostay <mranostay@ti.com> |
arm64: dts: ti: Rename clock-names adc_tsc_fck to fck
Avoid the following warnings from dt-schema by just renaming the clock-names string from adc_tsc_fck to fck so it matches the values in ti,am335
arm64: dts: ti: Rename clock-names adc_tsc_fck to fck
Avoid the following warnings from dt-schema by just renaming the clock-names string from adc_tsc_fck to fck so it matches the values in ti,am3359-tscadc.yaml
tscadc@40200000: clock-names:0: 'fck' was expected
Signed-off-by: Matt Ranostay <mranostay@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Judith Mendez <jm@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20221024151648.394623-1-mranostay@ti.com
show more ...
|
Revision tags: v6.0.3 |
|
#
4eb7aa3b |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level
The GPMC node defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless it is extended with
arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level
The GPMC node defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless it is extended with pinmux information.
As the pinmux is only known at the board integration level, this node should only be enabled when provided with this information.
Disable the GPMC node in the dtsi file. Since the ELM is made to work with the GPMC, disable it too.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-11-afd@ti.com
show more ...
|
#
4a579887 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
MCAN nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux
arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level
MCAN nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information.
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the MCAN nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-10-afd@ti.com
show more ...
|
#
f572888b |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
MDIO nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a pinmu
arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level
MDIO nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a pinmux.
As the attached PHY is only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the MDIO nodes (in both CPSW and ICSSG) in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-9-afd@ti.com
show more ...
|
#
3e21ec28 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
PCIe nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a SerDe
arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
PCIe nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a SerDes PHY. And usually only one of the two modes can be used at a time as they share a SerDes link.
As the PHY and mode is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the PCIe nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-7-afd@ti.com
show more ...
|
#
dcac8eaa |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
ECAP nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux
arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
ECAP nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. (These and the EPWM nodes could be used to trigger internal actions but they are not used like that currently)
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the ECAP nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-6-afd@ti.com
show more ...
|
#
ebc0ed71 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
EPWM nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux
arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level
EPWM nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information.
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the EPWM nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-5-afd@ti.com
show more ...
|
#
79d4aa62 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
SPI nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux in
arm64: dts: ti: k3-am64: Enable SPI nodes at the board level
SPI nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information.
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the SPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-4-afd@ti.com
show more ...
|
#
b80f75d8 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
I2C nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux in
arm64: dts: ti: k3-am64: Enable I2C nodes at the board level
I2C nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information.
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-3-afd@ti.com
show more ...
|
#
dacf4705 |
| 17-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am64: Enable UART nodes at the board level
UART nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux
arm64: dts: ti: k3-am64: Enable UART nodes at the board level
UART nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information.
As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information.
Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-2-afd@ti.com
show more ...
|