Revision tags: v4.17 |
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#
f64f2e0f |
| 24-May-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: a64: Add Amarula A64-Relic initial support
Amarula A64-Relic is Allwinner A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3
arm64: allwinner: a64: Add Amarula A64-Relic initial support
Amarula A64-Relic is Allwinner A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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#
af5d05bd |
| 24-Apr-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry Pi B+ form factor single board computer based o
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry Pi B+ form factor single board computer based on the Allwinner H2+, H3, or H5 SoCs with the same PCB. The board has 2GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes and connectors are in the exact same position as on the Raspberry Pi B+.
This patch enables the H5 variant using the H3 board definition moved to a common dtsi in an earlier patch. The dts simply include the common dtsi and declares the correct compatible and model of the H5 variant.
Suggested-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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#
d1df8c25 |
| 24-Apr-2018 |
Chen-Yu Tsai <wens@csie.org> |
arm64: dts: allwinner: Sort dtb entries in Makefile
The dtb entries for NanoPi boards in the device tree makefile somehow ended up after the Orange Pi boards.
Move them so the list is properly sort
arm64: dts: allwinner: Sort dtb entries in Makefile
The dtb entries for NanoPi boards in the device tree makefile somehow ended up after the Orange Pi boards.
Move them so the list is properly sorted.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.16 |
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#
a7affb13 |
| 16-Mar-2018 |
Hauke Mehrtens <hauke@hauke-m.de> |
arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
The Xunlong Orange Pi Zero Plus is single board computer. - H5 Quad-core 64-bit Cortex-A53 - 512MB DDR3 - microSD slot - Debug TTL UART - 1000M/
arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
The Xunlong Orange Pi Zero Plus is single board computer. - H5 Quad-core 64-bit Cortex-A53 - 512MB DDR3 - microSD slot - Debug TTL UART - 1000M/100M/10M Ethernet RJ45 - Realtek RTL8189FTV - Spi flash (2MB) - One USB 2.0 HOST, One USB 2.0 OTG
This is based on a patch from armbian: https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patch
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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#
c916eb95 |
| 15-Mar-2018 |
Harald Geyer <harald@ccbib.org> |
arm64: dts: allwinner: a64: Add support for TERES-I laptop
The TERES-I is an open hardware laptop built by Olimex using the Allwinner A64 SoC.
Add the board specific .dts file, which includes the A
arm64: dts: allwinner: a64: Add support for TERES-I laptop
The TERES-I is an open hardware laptop built by Olimex using the Allwinner A64 SoC.
Add the board specific .dts file, which includes the A64 .dtsi and enables the peripherals that we support so far.
Signed-off-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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#
494d8367 |
| 16-Mar-2018 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: allwinner: h6: add support for Pine H64 board
Pine H64 is an Allwinner H6-based SBC from Pine64, with the following features:
- 1GiB/2GiB/4GiB LPDDR3 DRAM (in 4GiB situation only 3GiB is acc
arm64: allwinner: h6: add support for Pine H64 board
Pine H64 is an Allwinner H6-based SBC from Pine64, with the following features:
- 1GiB/2GiB/4GiB LPDDR3 DRAM (in 4GiB situation only 3GiB is accessible) - AXP805 PMIC - Raspberry-Pi-compatible GPIO header, "Euler" GPIO header (not compatible with the "Euler" on Pine A64) and "Expansion" pin header - 2 USB 2.0 ports and 1 USB 3.0 ports - Audio jack - MicroSD slot and eMMC module slot - on-board SPI NOR flash - 1Gbps Ethernet port (via RTL8211E PHY) - HDMI port
Adds initial support for it, including the UART on the Expansion pin header.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.15, v4.13.16, v4.14 |
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#
7e7962dd |
| 05-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each DTB twice; one from arch/arm64/boot/dts/*/Makefile and the
kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each DTB twice; one from arch/arm64/boot/dts/*/Makefile and the other from the dtb-$(CONFIG_OF_ALL_DTBS) line in arch/arm64/boot/dts/Makefile. It could be a race problem when building DTBS in parallel.
Another minor issue is CONFIG_OF_ALL_DTBS covers only *.dts in vendor sub-directories, so this broke when Broadcom added one more hierarchy in arch/arm64/boot/dts/broadcom/<soc>/.
One idea to fix the issues in a clean way is to move DTB handling to Kbuild core scripts. Makefile.dtbinst already recognizes dtb-y natively, so it should not hurt to do so.
Add $(dtb-y) to extra-y, and $(dtb-) as well if CONFIG_OF_ALL_DTBS is enabled. All clutter things in Makefiles go away.
As a bonus clean-up, I also removed dts-dirs. Just use subdir-y directly to traverse sub-directories.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [robh: corrected BUILTIN_DTB to CONFIG_BUILTIN_DTB] Signed-off-by: Rob Herring <robh@kernel.org>
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#
74ce1896 |
| 01-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
We need to add "clean-files" in Makfiles to clean up DT blobs, but we often miss to do so.
Since there are no source files that e
kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
We need to add "clean-files" in Makfiles to clean up DT blobs, but we often miss to do so.
Since there are no source files that end with .dtb or .dtb.S, so we can clean-up those files from the top-level Makefile.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <robh@kernel.org>
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#
b2441318 |
| 01-Nov-2017 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license identifiers to apply.
- when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary:
SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became the concluded license(s).
- when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time.
In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related.
Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v4.13.5 |
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#
d7341305 |
| 07-Sep-2017 |
Antony Antony <antony@phenome.org> |
arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
Add initial DT for NanoPi NEO Plus2 by FriendlyARM - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU - 1 GB DDR3 RAM - 8GB eMMC fla
arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
Add initial DT for NanoPi NEO Plus2 by FriendlyARM - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU - 1 GB DDR3 RAM - 8GB eMMC flash (Samsung KLM8G1WEPD-B031) - micro SD card slot - Gigabit Ethernet (external RTL8211E-VB-CG chip) - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) - 2x USB 2.0 host ports & 2x USB via headers
Signed-off-by: Antony Antony <antony@phenome.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v4.13 |
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#
4969efb2 |
| 14-Aug-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: a64: Add A64-OLinuXino initial support
OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC.
OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit
arm64: allwinner: a64: Add A64-OLinuXino initial support
OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC.
OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver - 5V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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#
bf397214 |
| 14-Aug-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: a64: Add initial NanoPi A64 support
NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features - Allwi
arm64: allwinner: a64: Add initial NanoPi A64 support
NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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Revision tags: v4.12 |
|
#
ea43d9b8 |
| 12-Jun-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC.
H5 Orangepi Zero Plus 2 has - Quad-core Corte
arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC.
H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
bdecc9cb |
| 12-Jun-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC.
A64 Orangepi Win/WinPlus has - A64 Quad-cor
arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC.
A64 Orangepi Win/WinPlus has - A64 Quad-core Cortex-A53 64bit - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM - Debug TTL UART - Four USB 2.0 - HDMI - LCD - Audio and MIC - Wifi + BT - IR receiver - 5V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
96219b00 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
arm64: allwinner: a64: add device tree for SoPine with baseboard
Pine64 have made an official baseboard when SoPine SoM is out.
The official baseboard is like the original Pine64 -- but with SD car
arm64: allwinner: a64: add device tree for SoPine with baseboard
Pine64 have made an official baseboard when SoPine SoM is out.
The official baseboard is like the original Pine64 -- but with SD card slot replaced with Pine64's eMMC module slot.
Add a device tree for SoPine with the baseboard.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11 |
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#
d6d1291d |
| 17-Apr-2017 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: allwinner: h5: add support for NanoPi NEO2 board
NanoPi NEO2 is a board with the same size factor with the original NanoPi NEO by FriendlyELEC.
It has a H5 instead of H3 on NanoPi NEO, and t
arm64: allwinner: h5: add support for NanoPi NEO2 board
NanoPi NEO2 is a board with the same size factor with the original NanoPi NEO by FriendlyELEC.
It has a H5 instead of H3 on NanoPi NEO, and the ethernet is upgraded to 1Gbps (with external RTL8211E PHY).
Add support for this board.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
2ff28361 |
| 13-Apr-2017 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: allwinner: h5: add support for Orange Pi Prime board
Orange Pi Prime is a new Allwinner H5-based SBC by Xunlong.
It's like a Orange Pi Plus 2E with H3 replaced with H5, eMMC replaced with on
arm64: allwinner: h5: add support for Orange Pi Prime board
Orange Pi Prime is a new Allwinner H5-based SBC by Xunlong.
It's like a Orange Pi Plus 2E with H3 replaced with H5, eMMC replaced with onboard SPI NOR Flash and wireless card changed to Realtek RTL8723BS (with Bluetooth functionality).
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2 |
|
#
9d41bbb6 |
| 06-Mar-2017 |
Andre Przywara <andre.przywara@arm.com> |
arm64: allwinner: h5: add support for the Orange Pi PC 2 board
The Orange Pi PC 2 is a typical single board computer using the Allwinner H5 SoC. Apart from the usual suspects it features three separ
arm64: allwinner: h5: add support for the Orange Pi PC 2 board
The Orange Pi PC 2 is a typical single board computer using the Allwinner H5 SoC. Apart from the usual suspects it features three separately driven USB ports and a Gigabit Ethernet port. Also it has a SPI NOR flash soldered, from which the board can boot from. This enables the SBC to behave like a "real computer" with built-in firmware.
Add the board specific .dts file, which includes the H5 .dtsi and enables the peripherals that we support so far.
Reviewed-by: Rask Ingemann Lambertsen <rask@formelder.dk> Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Icenowy: dropped all GPIO pinctrl nodes, change red LED gpio, change MMC cd to active-low, rename some node names to prevent underscores] Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v4.10.1, v4.10 |
|
#
b8bcf0e1 |
| 09-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
arm64: allwinner: add BananaPi-M64 support
The Banana Pi M64 board is a typical single board computer based on the Allwinner A64 SoC. Aside from the usual peripherals it features eMMC storage, which
arm64: allwinner: add BananaPi-M64 support
The Banana Pi M64 board is a typical single board computer based on the Allwinner A64 SoC. Aside from the usual peripherals it features eMMC storage, which is connected to the 8-bit capable SDHC2 controller. Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1 as those two interfaces are connected to it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
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Revision tags: v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1 |
|
#
4e388608 |
| 19-Jan-2016 |
Andre Przywara <andre.przywara@arm.com> |
arm64: dts: add Pine64 support
The Pine64 is a cost-efficient development board based on the Allwinner A64 SoC. There are three models: the basic version with Fast Ethernet and 512 MB of DRAM (Pine6
arm64: dts: add Pine64 support
The Pine64 is a cost-efficient development board based on the Allwinner A64 SoC. There are three models: the basic version with Fast Ethernet and 512 MB of DRAM (Pine64) and two Pine64+ versions, which both feature Gigabit Ethernet and additional connectors for touchscreens and a camera. Or as my son put it: "Those are smaller and these are missing." ;-) The two Pine64+ models just differ in the amount of DRAM (1GB vs. 2GB). Since U-Boot will figure out the right size for us and patches the DT accordingly we just need to provide one DT for the Pine64+.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Maxime: Removed the common DTSI and include directly the pine64 DTS] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54 |
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95c83906 |
| 24-Jul-2020 |
Yangtao Li <frank@allwinnertech.com> |
arm64: allwinner: A100: add support for Allwinner Perf1 board A100 perf1 is an Allwinner A100-based SBC, with the following features: - 1GiB DDR3 DRAM - AXP803 PMIC - 2 USB
arm64: allwinner: A100: add support for Allwinner Perf1 board A100 perf1 is an Allwinner A100-based SBC, with the following features: - 1GiB DDR3 DRAM - AXP803 PMIC - 2 USB 2.0 ports - MicroSD slot and on-board eMMC module - on-board Nand flash - ··· Adds initial support for it, including UART and PMU. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/30f4a3fc6ac84d05094e2c3b89d1dddc8ff6b7fc.1595572867.git.frank@allwinnertech.com
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Revision tags: v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51 |
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e53568ca |
| 03-Jul-2020 |
Ondrej Jirman <megous@megous.com> |
arm64: dts: allwinner: Add support for PinePhone revision 1.2 Revision 1.2 should be the final production version of the PinePhone. It has most of the known HW quirks fixed. Int
arm64: dts: allwinner: Add support for PinePhone revision 1.2 Revision 1.2 should be the final production version of the PinePhone. It has most of the known HW quirks fixed. Interrupt to the magnetometer is routed correctly, in this revision. The bulk of the changes are in how modem and the USB-C HDMI bridge chip is powered and where the signals from the modem are connected. Also backlight intensity seemingly behaves differently, than on the 1.1 and 1.0 boards, and the PWM duty cycle where backlight starts to work is 10% (as tested on 2 1.2 PinePhones I have access to). Signed-off-by: Ondrej Jirman <megous@megous.com> Link: https://lore.kernel.org/r/20200703194842.111845-3-megous@megous.com Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Revision tags: v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23 |
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91f480d4 |
| 26-Feb-2020 |
Ondrej Jirman <megous@megous.com> |
arm64: dts: allwinner: Add initial support for Pine64 PinePhone At the moment PinePhone comes in two slightly incompatible variants: - 1.0: Early Developer Batch - 1.1: Bravehea
arm64: dts: allwinner: Add initial support for Pine64 PinePhone At the moment PinePhone comes in two slightly incompatible variants: - 1.0: Early Developer Batch - 1.1: Braveheart Batch There will be at least one more incompatible variant in the very near future, so let's start by sharing the dtsi among multiple variants, right away, even though the HW description doesn't yet include the different bits. The differences between 1.0 and 1.1 are: change in pins that control the flash LED, differences in modem power status signal routing, and maybe some other subtler things, that have not been determined yet. This is a basic DT that includes only features that are already supported by mainline drivers. Co-developed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Co-developed-by: Martijn Braam <martijn@brixit.nl> Signed-off-by: Martijn Braam <martijn@brixit.nl> Co-developed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bhushan Shah <bshah@kde.org> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Revision tags: v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13 |
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674ef1d0 |
| 15-Jan-2020 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: dts: allwinner: a64: add support for PineTab PineTab is a 10.1" tablet by Pine64 with Allwinner A64 inside. It includes the following peripherals: USB: - A micro
arm64: dts: allwinner: a64: add support for PineTab PineTab is a 10.1" tablet by Pine64 with Allwinner A64 inside. It includes the following peripherals: USB: - A microUSB Type-B port connected to the OTG-capable USB PHY of Allwinner A64. The ID pin is connected to a GPIO of the A64 SoC, and the Vbus is connected to the Vbus of AXP803 PMIC. These enables OTG functionality on this port. - A USB Type-A port is connected to the internal hub attached to the non-OTG USB PHY of Allwinner A64. - There are reserved pins for an external keyboard connected to the internal hub. Power: - The microUSB port has its Vbus connected to AXP803, mentioned above. - A DC jack (of a strange size, 2.5mm outer diameter) is connected to the ACIN of AXP803. - A Li-Polymer battery is connected to the battery pins of AXP803. Storage: - An tradition Pine64 eMMC slot is on the board, mounted with an eMMC module by factory. - An external microSD slot is hidden under a protect case. Display: - A MIPI-DSI LCD panel (800x1280) is connected to the DSI port of A64 SoC. - A mini HDMI port. Input: - A touch panel attached to a Goodix GT9271 touch controller. - Volume keys connected to the LRADC of the A64 SoC. Camera: - An OV5640 CMOS camera is at rear, connected to the CSI bus of A64 SoC. - A GC2145 CMOS camera is at front, shares the same CSI bus with OV5640. Audio: - A headphone jack is conencted to the SoC's internal codec. - A speaker connected is to the Line Out port of SoC's internal codec, via an amplifier. Misc: - Debug UART is muxed with the headphone jack, with the switch next to the microSD slot. - A bosch BMA223 accelerometer is connected to the I2C bus of A64 SoC. - Wi-Fi and Bluetooth are available via a RTL8723CS chip, similar to the one in Pinebook. This commit adds a basically usable device tree for it, implementing most of the features mentioned above. HDMI is not supported now because bad LCD-HDMI coexistence situation of mainline A64 display driver, the front camera currently lacks a driver and a facility to share the bus with the rear one, and the accelerometer currently lacks a DT binding. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Revision tags: v5.4.12, v5.4.11, v5.4.10, v5.4.9 |
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60d0426d |
| 06-Jan-2020 |
Chen-Yu Tsai <wens@csie.org> |
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board The Libre Computer ALL-H5-CC board is an upgraded version of the ALL-H3-CC. Changes include: - Gigabit Etherne
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board The Libre Computer ALL-H5-CC board is an upgraded version of the ALL-H3-CC. Changes include: - Gigabit Ethernet via external RTL8211E Ethernet PHY - 16 MiB SPI NOR flash memory - PoE tap header - Line out jack removed Only H5 variant test samples were made available, and the vendor is not certain whether other SoC variants would be made or not. Furthermore the board is a minor upgrade compared to the ALL-H3-CC. Thus the device tree simply includes the one for the ALL-H3-CC, and adds the changes on top. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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