Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26 |
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#
3caf7f49 |
| 08-Apr-2024 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a re
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a regression introduced in 6.5 by making sure that the correct offset is used for the DP_PHY_VCO_DIV register on v3 hardware.
Unfortunately, that fix instead broke DisplayPort on v5_5nm and v6 hardware as it failed to add the corresponding offsets also to those register tables.
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Fixes: 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") Cc: stable@vger.kernel.org # 6.5: 5abed58a8bde Cc: Stephen Boyd <swboyd@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20240408093023.506-1-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
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#
2b56188d |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") change
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") changed the offset that is used to write to DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different between v3 and v4 phys:
#define QSERDES_V3_DP_PHY_VCO_DIV 0x064 #define QSERDES_V4_DP_PHY_VCO_DIV 0x070
meaning that we write the wrong register on v3 phys now. Add another generic register to 'regs' and use it here instead of a version specific define to fix this.
This was discovered after Abhinav looked over register dumps with me from sc7180 Trogdor devices that started failing to light up the external display with v6.6 based kernels. It turns out that some monitors are very specific about their link clk frequency and if the default power on reset value is still there the monitor will show a blank screen or a garbled display. Other monitors are perfectly happy to get a bad clock signal.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240404234345.1446300-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
c219ef43 |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE registe
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE register was 'dp_dp_phy' before commit 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable"). There isn't any explanation in the commit why this is changed, so I suspect it was an oversight or happened while being extracted from some other series. Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I suspect this is dead code, but that can be fixed in another patch. It's not good to write to the wrong register space, and maybe some other version of this phy relies on this.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Neil Armstrong <neil.armstrong@linaro.org> Cc: Abel Vesa <abel.vesa@linaro.org> Cc: Steev Klimaszewski <steev@kali.org> Cc: Johan Hovold <johan+linaro@kernel.org> Cc: Bjorn Andersson <quic_bjorande@quicinc.com> Cc: stable@vger.kernel.org # 6.5 Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240405000111.1450598-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26 |
|
#
3caf7f49 |
| 08-Apr-2024 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a re
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a regression introduced in 6.5 by making sure that the correct offset is used for the DP_PHY_VCO_DIV register on v3 hardware.
Unfortunately, that fix instead broke DisplayPort on v5_5nm and v6 hardware as it failed to add the corresponding offsets also to those register tables.
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Fixes: 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") Cc: stable@vger.kernel.org # 6.5: 5abed58a8bde Cc: Stephen Boyd <swboyd@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20240408093023.506-1-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
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2b56188d |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") change
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") changed the offset that is used to write to DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different between v3 and v4 phys:
#define QSERDES_V3_DP_PHY_VCO_DIV 0x064 #define QSERDES_V4_DP_PHY_VCO_DIV 0x070
meaning that we write the wrong register on v3 phys now. Add another generic register to 'regs' and use it here instead of a version specific define to fix this.
This was discovered after Abhinav looked over register dumps with me from sc7180 Trogdor devices that started failing to light up the external display with v6.6 based kernels. It turns out that some monitors are very specific about their link clk frequency and if the default power on reset value is still there the monitor will show a blank screen or a garbled display. Other monitors are perfectly happy to get a bad clock signal.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240404234345.1446300-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
c219ef43 |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE registe
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE register was 'dp_dp_phy' before commit 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable"). There isn't any explanation in the commit why this is changed, so I suspect it was an oversight or happened while being extracted from some other series. Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I suspect this is dead code, but that can be fixed in another patch. It's not good to write to the wrong register space, and maybe some other version of this phy relies on this.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Neil Armstrong <neil.armstrong@linaro.org> Cc: Abel Vesa <abel.vesa@linaro.org> Cc: Steev Klimaszewski <steev@kali.org> Cc: Johan Hovold <johan+linaro@kernel.org> Cc: Bjorn Andersson <quic_bjorande@quicinc.com> Cc: stable@vger.kernel.org # 6.5 Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240405000111.1450598-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26 |
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#
3caf7f49 |
| 08-Apr-2024 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a re
phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6
commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream.
Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") fixed a regression introduced in 6.5 by making sure that the correct offset is used for the DP_PHY_VCO_DIV register on v3 hardware.
Unfortunately, that fix instead broke DisplayPort on v5_5nm and v6 hardware as it failed to add the corresponding offsets also to those register tables.
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Fixes: 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") Cc: stable@vger.kernel.org # 6.5: 5abed58a8bde Cc: Stephen Boyd <swboyd@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20240408093023.506-1-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
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#
2b56188d |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") change
phy: qcom: qmp-combo: Fix VCO div offset on v3
commit 5abed58a8bde6d349bde364a160510b5bb904d18 upstream.
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") changed the offset that is used to write to DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different between v3 and v4 phys:
#define QSERDES_V3_DP_PHY_VCO_DIV 0x064 #define QSERDES_V4_DP_PHY_VCO_DIV 0x070
meaning that we write the wrong register on v3 phys now. Add another generic register to 'regs' and use it here instead of a version specific define to fix this.
This was discovered after Abhinav looked over register dumps with me from sc7180 Trogdor devices that started failing to light up the external display with v6.6 based kernels. It turns out that some monitors are very specific about their link clk frequency and if the default power on reset value is still there the monitor will show a blank screen or a garbled display. Other monitors are perfectly happy to get a bad clock signal.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup clocks") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240404234345.1446300-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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c219ef43 |
| 04-Apr-2024 |
Stephen Boyd <swboyd@chromium.org> |
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE registe
phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
commit ee13e1f3c72b9464a4d73017c060ab503eed653a upstream.
The register base that was used to write to the QSERDES_DP_PHY_MODE register was 'dp_dp_phy' before commit 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable"). There isn't any explanation in the commit why this is changed, so I suspect it was an oversight or happened while being extracted from some other series. Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I suspect this is dead code, but that can be fixed in another patch. It's not good to write to the wrong register space, and maybe some other version of this phy relies on this.
Cc: Douglas Anderson <dianders@chromium.org> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Neil Armstrong <neil.armstrong@linaro.org> Cc: Abel Vesa <abel.vesa@linaro.org> Cc: Steev Klimaszewski <steev@kali.org> Cc: Johan Hovold <johan+linaro@kernel.org> Cc: Bjorn Andersson <quic_bjorande@quicinc.com> Cc: stable@vger.kernel.org # 6.5 Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240405000111.1450598-1-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3 |
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#
76d20290 |
| 11-Sep-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
phy: qcom-qmp-combo: initialize PCS_USB registers
Currently, PCS_USB registers that have their initialization data in a pcs_usb_tbl table are never initialized. Fix that.
Fixes: fc64623637da ("phy:
phy: qcom-qmp-combo: initialize PCS_USB registers
Currently, PCS_USB registers that have their initialization data in a pcs_usb_tbl table are never initialized. Fix that.
Fixes: fc64623637da ("phy: qcom-qmp-combo,usb: add support for separate PCS_USB region") Reported-by: Adrien Thierry <athierry@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-2-34ec434194c5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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112c2370 |
| 11-Sep-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
phy: qcom-qmp-combo: Square out 8550 POWER_STATE_CONFIG1
There are two instances of the POWER_STATE_CONFIG1 register: one in the PCS space and another one in PCS_USB.
The downstream init sequence p
phy: qcom-qmp-combo: Square out 8550 POWER_STATE_CONFIG1
There are two instances of the POWER_STATE_CONFIG1 register: one in the PCS space and another one in PCS_USB.
The downstream init sequence pokes the latter one while we've been poking the former one (and misnamed it as the latter one, impostor!). Fix that up to avoid UB.
Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550") Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-1-34ec434194c5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48 |
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#
b83eb8ba |
| 20-Aug-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-combo: fix clock probing
During rebase of qcom-qmp-combo series a call to devm_clk_bulk_get_all() got moved by git from qmp_combo_parse_dt_legacy() to phy_dp_clks_register(). This does
phy: qcom-qmp-combo: fix clock probing
During rebase of qcom-qmp-combo series a call to devm_clk_bulk_get_all() got moved by git from qmp_combo_parse_dt_legacy() to phy_dp_clks_register(). This doesn't have any serious effect, since the clocks will be set in both legacy and non-legacy paths. However let's move it back to place anyway, to prevent the driver from fetching clocks twice.
Fixes: 28e265bf84a8 ("phy: qcom-qmp-combo: simplify clock handling") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820235813.562284-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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#
486392f4 |
| 11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry
Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Sign
phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry
Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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a542ae82 |
| 11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-combo: populate offsets for all combo PHYs
In order to support newer style bindings for combo PHYs, populate offsets for all Combo QMP PHY configurations.
Reviewed-by: Neil Armstrong
phy: qcom-qmp-combo: populate offsets for all combo PHYs
In order to support newer style bindings for combo PHYs, populate offsets for all Combo QMP PHY configurations.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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28e265bf |
| 11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-combo: simplify clock handling
For the existing PHYs for new binding we are going to drop ref_clk_src clock and always use ref clock. Rather than introducing additional code to handle
phy: qcom-qmp-combo: simplify clock handling
For the existing PHYs for new binding we are going to drop ref_clk_src clock and always use ref clock. Rather than introducing additional code to handle legacy vs current bindings (and clock names), use devm_clk_bulk_get_optional() when new bindings are used and devm_clk_bulk_get_all() when legacy bindings are in place.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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7559e757 |
| 14-Jul-2023 |
Rob Herring <robh@kernel.org> |
phy: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that mer
phy: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes.
Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4 |
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ec17373a |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: extract common function to setup clocks
Extact qmp_combo_configure_dp_clocks(), a common function to setup PHY clocks depending on the selected link rate.
Signed-off-by: Dmitr
phy: qcom: qmp-combo: extract common function to setup clocks
Extact qmp_combo_configure_dp_clocks(), a common function to setup PHY clocks depending on the selected link rate.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-8-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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31a4ac68 |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: drop qmp_v6_dp_aux_init()
The only difference between qmp_v6_dp_aux_init() and qmp_v4_dp_aux_init() is the address of COM_BIAS_EN_CLKBUFLR_EN register. Move it to register layo
phy: qcom: qmp-combo: drop qmp_v6_dp_aux_init()
The only difference between qmp_v6_dp_aux_init() and qmp_v4_dp_aux_init() is the address of COM_BIAS_EN_CLKBUFLR_EN register. Move it to register layout and drop the duplicate function.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-7-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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9e6a0403 |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: drop similar functions
The functions qmp_v5_configure_dp_phy() and qmp_v6_configure_dp_phy() are now copies of qmp_v4_configure_dp_phy(). Drop them and use the v4 function in a
phy: qcom: qmp-combo: drop similar functions
The functions qmp_v5_configure_dp_phy() and qmp_v6_configure_dp_phy() are now copies of qmp_v4_configure_dp_phy(). Drop them and use the v4 function in all the cases.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-6-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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cd1f3343 |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: reuse register layouts for some more registers
Use register layout for TX_HIGHZ_DRVR_EN and TX_TRANSCEIVER_BIAS_EN registers. This will allow us to unify qmp_v[456]_configure_d
phy: qcom: qmp-combo: reuse register layouts for some more registers
Use register layout for TX_HIGHZ_DRVR_EN and TX_TRANSCEIVER_BIAS_EN registers. This will allow us to unify qmp_v[456]_configure_dp_phy() functions in the next commit.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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186ad90a |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: reuse register layouts for even more registers
Instead of passing additional registers to qmp_combo_configure_dp_swing(), reuse qphy_reg_layout and add those registers to regis
phy: qcom: qmp-combo: reuse register layouts for even more registers
Instead of passing additional registers to qmp_combo_configure_dp_swing(), reuse qphy_reg_layout and add those registers to register layout maps.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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8447fa7f |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: reuse register layouts for more registers
Instead of passing additional registers to qmp_v456_configure_dp_phy(), reuse qphy_reg_layout and add those registers to register layo
phy: qcom: qmp-combo: reuse register layouts for more registers
Instead of passing additional registers to qmp_v456_configure_dp_phy(), reuse qphy_reg_layout and add those registers to register layout maps.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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6292fd92 |
| 21-Jun-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-combo: correct bias0_en programming
It seems the commit a2e927b0e50d ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys") contained a typo for selecting bias0_en values. First, bia
phy: qcom: qmp-combo: correct bias0_en programming
It seems the commit a2e927b0e50d ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys") contained a typo for selecting bias0_en values. First, bias0_en and bias1_en are expected to be symmetrical, and then the vendor driver also uses `flipped : 0x3E : 0x15` statement for bias0_en. Correct bias0_en programming to follow this.
Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550") Fixes: a2e927b0e50d ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-2-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v6.1.35, v6.1.34, v6.1.33, v6.1.32 |
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#
757a788c |
| 30-May-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-combo: add support for the USB+DP PHY on SM8150 platform
SM8150 and SC8180X are close relatives. Reuse sc8180x data to support USB+DP combo PHY on SM8150 platform.
Signed-off-by: Dmit
phy: qcom-qmp-combo: add support for the USB+DP PHY on SM8150 platform
SM8150 and SC8180X are close relatives. Reuse sc8180x data to support USB+DP combo PHY on SM8150 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230531023415.1209301-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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6cd52a2a |
| 01-Jun-2023 |
Neil Armstrong <neil.armstrong@linaro.org> |
phy: qcom: qmp-combo: fix Display Port PHY configuration for SM8550
The SM8550 PHY also uses a different offset for the CMN_STATUS reg, use the right one for the v6 Display Port configuration.
Fixe
phy: qcom: qmp-combo: fix Display Port PHY configuration for SM8550
The SM8550 PHY also uses a different offset for the CMN_STATUS reg, use the right one for the v6 Display Port configuration.
Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-phy-init-fix-v1-1-4e9da9f97991@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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