Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35 |
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#
5095d045 |
| 15-Jun-2023 |
Justin Chen <justin.chen@broadcom.com> |
phy: usb: Turn off phy when port is in suspend
The COMMONONN bit turns off the PHY when the host controller puts it into suspend state. This can happen during the following... - Nothing is connected
phy: usb: Turn off phy when port is in suspend
The COMMONONN bit turns off the PHY when the host controller puts it into suspend state. This can happen during the following... - Nothing is connected to the port - The host controller goes into low power mode whatever due to auto suspend or system suspend.
With COMMONONN we also must unset U2_FREECLK_EXISTS since the UTMI clock is fed by the PHY.
With these changes we see a power savings of ~12mW when port is in suspend.
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Justin Chen <justin.chen@broadcom.com> Link: https://lore.kernel.org/r/1686859578-45242-2-git-send-email-justin.chen@broadcom.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1 |
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#
8484199c |
| 05-Oct-2022 |
Justin Chen <justinpopo6@gmail.com> |
phy: usb: Fix clock imbalance for suspend/resume
We should be disabling clocks when wake from USB is not needed. Since this wasn't done, we had a clock imbalance since clocks were always being enabl
phy: usb: Fix clock imbalance for suspend/resume
We should be disabling clocks when wake from USB is not needed. Since this wasn't done, we had a clock imbalance since clocks were always being enabled on resume.
Fixes: ae532b2b7aa5 ("phy: usb: Add "wake on" functionality for newer Synopsis XHCI controllers") Fixes: b0c0b66c0b43 ("phy: usb: Add support for wake and USB low power mode for 7211 S2/S5") Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/1665005418-15807-7-git-send-email-justinpopo6@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
700c44b5 |
| 05-Oct-2022 |
Justin Chen <justinpopo6@gmail.com> |
phy: usb: Use slow clock for wake enabled suspend
The logic was incorrect when switching to slow clock. We want the slow clock if wake_enabled is set.
Fixes: ae532b2b7aa5 ("phy: usb: Add "wake on"
phy: usb: Use slow clock for wake enabled suspend
The logic was incorrect when switching to slow clock. We want the slow clock if wake_enabled is set.
Fixes: ae532b2b7aa5 ("phy: usb: Add "wake on" functionality for newer Synopsis XHCI controllers") Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/1665005418-15807-6-git-send-email-justinpopo6@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
833c173e |
| 05-Oct-2022 |
Justin Chen <justinpopo6@gmail.com> |
phy: usb: Disable phy auto-suspend
The BDC block requires the PLL lock in order to grab the PLL clock. The phy auto-suspend feature turns off the phy when nothing is attached leading to the PLL to n
phy: usb: Disable phy auto-suspend
The BDC block requires the PLL lock in order to grab the PLL clock. The phy auto-suspend feature turns off the phy when nothing is attached leading to the PLL to not lock. This leads the BDC block to grab the AUX clock instead of the PLL clock. This is not ideal, so lets turn this feature off.
Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/1665005418-15807-5-git-send-email-justinpopo6@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7e81153d |
| 05-Oct-2022 |
Justin Chen <justinpopo6@gmail.com> |
phy: usb: Migrate to BIT and BITMASK macros
Using BIT and BITMASK macros makes it much easier to read and make modifications. Also reordered some constants to be in numerical order.
Signed-off-by:
phy: usb: Migrate to BIT and BITMASK macros
Using BIT and BITMASK macros makes it much easier to read and make modifications. Also reordered some constants to be in numerical order.
Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/1665005418-15807-4-git-send-email-justinpopo6@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
32fb07f3 |
| 05-Oct-2022 |
Justin Chen <justinpopo6@gmail.com> |
phy: usb: Improve port mode selection
Split port modes into two different variables. Supported port modes is what the hardware supports. While port mode is how the hardware is currently configured a
phy: usb: Improve port mode selection
Split port modes into two different variables. Supported port modes is what the hardware supports. While port mode is how the hardware is currently configured and can be dynamically changed through the sysfs. We initialize all supported port modes on init even though the port mode may not be selected because we cannot guarantee the downstream interface from the phy will be active or not.
This also fixes an issue where port modes selected via sysfs were not being saved through suspend/resume.
Signed-off-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/1665005418-15807-2-git-send-email-justinpopo6@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24 |
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#
ae532b2b |
| 14-Feb-2022 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add "wake on" functionality for newer Synopsis XHCI controllers
Add "wake on" support for the newer Synopsis based XHCI only controller. This works on the 72165 and 72164 and newer chips a
phy: usb: Add "wake on" functionality for newer Synopsis XHCI controllers
Add "wake on" support for the newer Synopsis based XHCI only controller. This works on the 72165 and 72164 and newer chips and does not work on 7216 based systems. Also switch the USB sysclk to a slower clock on suspend to save additional power in S2. The clock switch will only save power on the 72165b0 and newer chips and is a nop on older chips.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220215032422.5179-1-f.fainelli@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14 |
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#
209c8058 |
| 02-Oct-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Fix incorrect clearing of tca_drv_sel bit in SETUP reg for 7211
The 7211a0 has a tca_drv_sel bit in the USB SETUP register that should never be enabled. This feature is only used if there
phy: usb: Fix incorrect clearing of tca_drv_sel bit in SETUP reg for 7211
The 7211a0 has a tca_drv_sel bit in the USB SETUP register that should never be enabled. This feature is only used if there is a USB Type-C PHY, and the 7211 does not have one. If the bit is enabled, the VBUS signal will never be asserted. In the 7211a0, the bit was incorrectly defaulted to on so the driver had to clear the bit. In the 7211c0 the state was inverted so the driver should no longer clear the bit. This hasn't been a problem because all current 7211 boards don't use the VBUS signal, but there are some future customer boards that may use it.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20201002190115.48017-1-alcooperx@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8 |
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#
b0c0b66c |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for wake and USB low power mode for 7211 S2/S5
Add support for 7211 USB wake. Disable all possible 7211 USB logic for S2/S5 if USB wake is not enabled.
On the 7211, the XHCI w
phy: usb: Add support for wake and USB low power mode for 7211 S2/S5
Add support for 7211 USB wake. Disable all possible 7211 USB logic for S2/S5 if USB wake is not enabled.
On the 7211, the XHCI wake signal was not connected properly and only goes to the USB1_USB1_CTRL_TP_DIAG1 diagonstic register. The workaround is to have VPU code running that polls for the proper bit in the DIAG register and to wake the system when the bit is asserted.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
bed63b63 |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: bdc: Fix occasional failure with BDC on 7211
The BDC "Read Transaction Size" needs to be changed from 1024 bytes to 256 bytes to prevent occasional transaction failures.
Signed-off-by: Al
phy: usb: bdc: Fix occasional failure with BDC on 7211
The BDC "Read Transaction Size" needs to be changed from 1024 bytes to 256 bytes to prevent occasional transaction failures.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
fc430aea |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: PHY's MDIO registers not accessible without device installed
When there is no device connected and FSM is enabled, the XHCI puts the PHY into suspend mode. When the PHY is put into suspen
phy: usb: PHY's MDIO registers not accessible without device installed
When there is no device connected and FSM is enabled, the XHCI puts the PHY into suspend mode. When the PHY is put into suspend mode the USB LDO powers down the PHY. This causes the MDIO to be inaccessible and its registers reset to default. The fix is to disable FSM.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
9d5f51dc |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for new Synopsys USB controller on the 7211b0
The 7211b0 has added the STB XHCI Synopsys controller and it will be used instead of the RPi based DWC USB controller. The new Syn
phy: usb: Add support for new Synopsys USB controller on the 7211b0
The 7211b0 has added the STB XHCI Synopsys controller and it will be used instead of the RPi based DWC USB controller. The new Synopsys XHCI controller core is the same one that is used on the 7216, but because of the way the STB USB PHY is used on both the A0 and B0, some of the PHY control is different.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
4e5b9c9a |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for new Synopsys USB controller on the 7216
The 7216 has the new USB XHCI controller from Synopsys. While this new controller and the PHY are similar to the STB versions, the m
phy: usb: Add support for new Synopsys USB controller on the 7216
The 7216 has the new USB XHCI controller from Synopsys. While this new controller and the PHY are similar to the STB versions, the major differences are:
- Many of the registers and fields in the CTRL block have been removed or changed. - A new set of Synopsys control registers, BCHP_USB_XHCI_GBL, were added. - MDIO functionality has been replaced with direct access registers in the BCHP_USB_XHCI_GBL block. - Power up PHY defaults that had to be changed by MDIO in previous chips will now power up with the correct defaults.
A new init module was created for this new Synopsys USB controller. A new compatible string was added and the driver will dispatch into one of two init modules based on it. A "reg-names" field was added so the driver can more easily get optional registers. A DT bindings document was also added for this driver.
Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14 |
|
#
209c8058 |
| 02-Oct-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Fix incorrect clearing of tca_drv_sel bit in SETUP reg for 7211 The 7211a0 has a tca_drv_sel bit in the USB SETUP register that should never be enabled. This feature is only us
phy: usb: Fix incorrect clearing of tca_drv_sel bit in SETUP reg for 7211 The 7211a0 has a tca_drv_sel bit in the USB SETUP register that should never be enabled. This feature is only used if there is a USB Type-C PHY, and the 7211 does not have one. If the bit is enabled, the VBUS signal will never be asserted. In the 7211a0, the bit was incorrectly defaulted to on so the driver had to clear the bit. In the 7211c0 the state was inverted so the driver should no longer clear the bit. This hasn't been a problem because all current 7211 boards don't use the VBUS signal, but there are some future customer boards that may use it. Signed-off-by: Al Cooper <alcooperx@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20201002190115.48017-1-alcooperx@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Revision tags: v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8 |
|
#
b0c0b66c |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for wake and USB low power mode for 7211 S2/S5 Add support for 7211 USB wake. Disable all possible 7211 USB logic for S2/S5 if USB wake is not enabled. On
phy: usb: Add support for wake and USB low power mode for 7211 S2/S5 Add support for 7211 USB wake. Disable all possible 7211 USB logic for S2/S5 if USB wake is not enabled. On the 7211, the XHCI wake signal was not connected properly and only goes to the USB1_USB1_CTRL_TP_DIAG1 diagonstic register. The workaround is to have VPU code running that polls for the proper bit in the DIAG register and to wake the system when the bit is asserted. Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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|
#
bed63b63 |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: bdc: Fix occasional failure with BDC on 7211 The BDC "Read Transaction Size" needs to be changed from 1024 bytes to 256 bytes to prevent occasional transaction failures.
phy: usb: bdc: Fix occasional failure with BDC on 7211 The BDC "Read Transaction Size" needs to be changed from 1024 bytes to 256 bytes to prevent occasional transaction failures. Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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fc430aea |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: PHY's MDIO registers not accessible without device installed When there is no device connected and FSM is enabled, the XHCI puts the PHY into suspend mode. When the PHY is put
phy: usb: PHY's MDIO registers not accessible without device installed When there is no device connected and FSM is enabled, the XHCI puts the PHY into suspend mode. When the PHY is put into suspend mode the USB LDO powers down the PHY. This causes the MDIO to be inaccessible and its registers reset to default. The fix is to disable FSM. Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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9d5f51dc |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for new Synopsys USB controller on the 7211b0 The 7211b0 has added the STB XHCI Synopsys controller and it will be used instead of the RPi based DWC USB controller.
phy: usb: Add support for new Synopsys USB controller on the 7211b0 The 7211b0 has added the STB XHCI Synopsys controller and it will be used instead of the RPi based DWC USB controller. The new Synopsys XHCI controller core is the same one that is used on the 7216, but because of the way the STB USB PHY is used on both the A0 and B0, some of the PHY control is different. Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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4e5b9c9a |
| 03-Jan-2020 |
Al Cooper <alcooperx@gmail.com> |
phy: usb: Add support for new Synopsys USB controller on the 7216 The 7216 has the new USB XHCI controller from Synopsys. While this new controller and the PHY are similar to the STB ver
phy: usb: Add support for new Synopsys USB controller on the 7216 The 7216 has the new USB XHCI controller from Synopsys. While this new controller and the PHY are similar to the STB versions, the major differences are: - Many of the registers and fields in the CTRL block have been removed or changed. - A new set of Synopsys control registers, BCHP_USB_XHCI_GBL, were added. - MDIO functionality has been replaced with direct access registers in the BCHP_USB_XHCI_GBL block. - Power up PHY defaults that had to be changed by MDIO in previous chips will now power up with the correct defaults. A new init module was created for this new Synopsys USB controller. A new compatible string was added and the driver will dispatch into one of two init modules based on it. A "reg-names" field was added so the driver can more easily get optional registers. A DT bindings document was also added for this driver. Signed-off-by: Al Cooper <alcooperx@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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